Display Substrate Drive Circuit Layout for Narrow Bezel
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Solution Overview
Problem
Current display technologies face challenges in achieving a high screen-to-body ratio and narrow bezel design, particularly in wearable devices, due to the limited space occupied by drive circuits in display substrates.
Innovation Solution
The display substrate incorporates a drive circuit with a first capacitor, a second capacitor, and a third capacitor arranged along a direction, where the second and third capacitors are positioned on both sides of the first capacitor, with one electrode plate of the third capacitor connected to the power supply line, and additional signal lines and power supply lines are strategically placed to minimize space, allowing for a narrower non-display region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the drive circuit is arranged in a conventional layout, then the circuit functionality is ensured, but the occupied area is large which limits the screen-to-body ratio
Solution Approach 1:
The patent transitions from a planar arrangement to a three-dimensional stacked configuration. Capacitors C1 and C2 are positioned on different layers (first and second electrode plates respectively), utilizing vertical space to reduce the horizontal footprint of the drive circuit while maintaining all necessary electrical connections and functional integrity.
Solution Approach 2:
The patent implements nested positioning where capacitor elements are arranged in a compact configuration with C1 and C2 sharing spatial proximity through vertical stacking. The electrode plates are positioned such that they occupy overlapping or adjacent regions in the vertical dimension, effectively nesting the capacitor structures to minimize the overall circuit area.
2Reliability
If more capacitors are added to the drive circuit, then the circuit performance is improved, but the device complexity increases
Solution Approach 1:
The patent combines multiple capacitor functions into a compact integrated structure. Capacitors C1 and C2 are positioned in close proximity with shared spatial resources, and their electrode plates are configured to utilize common structural elements and routing paths, thereby reducing the overall circuit complexity despite incorporating multiple capacitive elements for enhanced performance.
Solution Approach 2:
By stacking capacitor elements vertically across multiple layers, the patent accommodates additional capacitive components without proportionally increasing the horizontal circuit complexity. The three-dimensional arrangement allows multiple capacitors to coexist in a compact volume, managing device complexity through spatial optimization rather than planar expansion.
3Area of stationary object
If the non-display region is reduced, then the screen-to-body ratio is increased, but the space for drive circuit placement is limited
Solution Approach 1:
The patent resolves the space constraint by utilizing the vertical dimension for circuit element placement. The stacked capacitor configuration and three-dimensional routing allow the drive circuit to fit into a smaller horizontal footprint, enabling reduction of the non-display region while maintaining adequate space for all necessary circuit components and their interconnections.
Solution Approach 2:
The patent segments the drive circuit into multiple functional layers and modules. By dividing the circuit into distinct stacked components (different electrode plates, different capacitor layers), each segment can be independently optimized for space efficiency, allowing the overall circuit to be compacted into the reduced non-display region while maintaining layout flexibility through modular design.
Data Source
AI summary
Provided are a display substrate and a preparation method thereof, and a display apparatus. The display substrate includes an underlay substrate, and a drive circuit and a first power supply line disposed on the underlay substrate, the drive circuit at least includes a first capacitor, a second capacitor, and a third capacitor; the first capacitor and the third capacitor are arranged along a first direction, the second capacitor and the third capacitor are respectively located on both sides of the first capacitor, the second capacitor is located on one side of the first capacitor close to a display region, and one electrode plate of the third capacitor is electrically connected with the first power supply line; an orthographic projection of the first capacitor on the underlay substrate is at least partially overlapped with an orthographic projection of the first power supply line on the underlay substrate.


