Display Substrate Shift Register Wiring for Narrow Frame Layouts

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Solution Overview

Problem

Current display substrates with integrated gate driving circuits face challenges in minimizing the size of the shift register unit, which limits the design of narrow frame displays and affects display quality due to inefficient wire connections and layout optimizations.

Innovation Solution

The display substrate incorporates a shift register unit with optimized connections and layout, including specific configurations for clock signal lines, power lines, and transistor structures, such as double-gate transistors and unique connection wire arrangements, to reduce the size of the shift register unit and enhance display substrate design.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If conventional wire connections and structural layouts are used in the shift register unit, then the circuit functionality is maintained, but the size of the light-emitting control driving circuit array (EM GOA) is large, preventing narrow frame design

Engineering Contradiction:
Improvesize of EM GOAVSAvoidwire connection efficiency
Core Design Contradiction:
Area of stationary objectVSEase of manufacture

Solution Approach 1:

The patent applies dimensionality change by routing connection wires in multiple layers and directions. Specifically, the first connection wire includes a first portion extending in a first direction and a second portion extending in a second direction, creating a multi-dimensional wire layout that optimizes space utilization and reduces the overall EM GOA area while maintaining all necessary electrical connections

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The first connection wire is segmented into multiple portions (first portion and second portion) that extend in different directions. This segmentation allows the wire to efficiently connect to multiple components (first control transistor and second control transistor) while minimizing the total area occupied by the connection network in the EM GOA

Inventive Principle:
Principle #1Segmentation

2Area of stationary object

If the shift register unit is compacted to reduce EM GOA size, then narrow frame design is enabled, but wire connection complexity increases

Engineering Contradiction:
Improvesize of shift register unitVSAvoidconnection structure complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent merges multiple connection functions into a single integrated first connection wire structure. This wire simultaneously connects to the first control transistor, second control transistor, and other circuit elements within the shift register unit, reducing the number of separate connection structures needed and simplifying the overall device complexity despite the compacted layout

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

By utilizing multi-directional wire routing (first direction and second direction portions), the patent achieves efficient space utilization in the compacted shift register unit. This dimensional approach to wire layout reduces the need for additional complex connection structures that would otherwise be required in a purely planar configuration

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11967286B2Display substrate and manufacturing method thereof, display device
Publication Date: 2024.04.23 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US11967286B2 patent drawing
  • US11967286B2 patent drawing
  • US11967286B2 patent drawing

AI summary

A display substrate and a manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, and includes a shift register unit, a first clock signal line, and a second clock signal line in a peripheral region; a first portion and a second portion of a first connection wire of the display substrate are connected to a first gate electrode of a first control transistor of the shift register unit; an orthographic projection of the first portion on the base substrate is on a side of an orthographic projection of an active layer of the first control transistor on the base substrate away from a display region; and an orthographic projection of the second portion on the base substrate is on a side of the orthographic projection of the active layer of the first control transistor on the base substrate close to the display region.