Display Substrate Electrostatic Rings for ESD Protection

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Solution Overview

Problem

Existing electronic paper display technologies face issues with electrostatic discharge (ESD) during screen printing and film peeling, which can damage test transistors and affect normal operation, and common voltage sensing is prone to fluctuations and electric leakage.

Innovation Solution

A display substrate with a bezel region containing test sub-terminals and electrostatic rings, where non-common voltage test sub-terminals are arranged in series and/or grounded through first electrostatic rings, and a second electrostatic ring connected between the common voltage test sub-terminal and an adjacent non-common voltage test sub-terminal, to manage static electricity and prevent transistor activation due to ESD, while ensuring accurate common voltage sensing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If test sub-terminals are provided on the display substrate for electrical detection, then testing functionality is improved, but electrostatic discharge during screen printing and film peeling can damage test transistors

Engineering Contradiction:
Improvetesting functionalityVSAvoidtransistor integrity
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

An electrostatic ring structure is introduced as an intermediary component between the test sub-terminals and the test transistors. This electrostatic ring acts as a mediator that captures and dissipates electrostatic charges before they can reach and damage the test transistors, thereby protecting the transistor integrity while maintaining testing functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent converts the harmful electrostatic discharge (ESD) into a beneficial protective mechanism. The electrostatic ring is designed to attract and accumulate electrostatic charges that would otherwise damage the transistors. By providing a controlled path for ESD through the electrostatic ring to ground, the harmful effect is transformed into a protective function that safeguards the test transistors during screen printing and film peeling processes.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Reliability

If electrostatic rings are added to protect test transistors, then antistatic capability is improved, but device complexity increases

Engineering Contradiction:
Improveantistatic capabilityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The electrostatic ring structure is merged with the existing test terminal layout and grounding system. Rather than adding completely separate protective components, the electrostatic rings are integrated into the bezel region where test terminals already exist, sharing the same grounding path and spatial arrangement. This merging approach provides ESD protection while minimizing additional structural complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The electrostatic ring structure is designed to automatically capture and dissipate electrostatic charges without requiring external control or additional active components. The passive electrostatic ring structure self-regulates by providing a preferential path for ESD to ground, eliminating the need for complex control circuits or external intervention, thereby maintaining simplicity while improving antistatic capability.

Inventive Principle:
Principle #25Self-service

3Reliability

If non-common voltage test sub-terminals are arranged in series through electrostatic rings, then ESD dispersion is improved, but manufacturing precision requirements increase

Engineering Contradiction:
ImproveESD dispersionVSAvoidconnection precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The electrostatic protection function is segmented into multiple discrete electrostatic ring structures, each associated with specific test sub-terminals. By dividing the protection function across multiple segments rather than using a single centralized protection mechanism, the patent improves ESD dispersion while allowing each segment to be manufactured and positioned independently, thereby reducing overall manufacturing precision requirements.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively disperses ESD, reduces its adverse effects on test transistors, and maintains accurate common voltage sensing by increasing electrostatic discharge paths and minimizing leakage, thereby enhancing the antistatic capability and display performance.

Implementation Method 1

the first electrostatic ring is in the bezel region, through which the plurality of non-common voltage test sub-terminals are arranged in series and/or grounded

Methodology Applied
Scientific EffectElectrostatic discharge: Electrostatic Discharge

Data Source

PatentUS20250093730A1Display substrate, manufacturing method thereof, intermediate substrate, and electronic paper display apparatus
Publication Date: 2025.03.20 FUZHOU BOE OPTOELECTRONICS TECH CO LTD
  • US20250093730A1 patent drawing
  • US20250093730A1 patent drawing
  • US20250093730A1 patent drawing

AI summary

The present disclosure provides a display substrate, a manufacturing method thereof, an intermediate substrate and an electronic paper display apparatus. The display substrate includes: a base substrate including a display region and a bezel region on at least one side of the display region; a plurality of test sub-terminals in the bezel region, including a common voltage test sub-terminal and a plurality of non-common voltage test sub-terminals; and a first electrostatic ring in the bezel region, through which the plurality of non-common voltage test sub-terminals are arranged in series and/or grounded.