Display Substrate Multi-Node Fan-Out Routing for Bezel Reduction
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Solution Overview
Problem
Current special-shaped display panels face challenges in minimizing the bezel due to the arrangement of fan-out traces, which occupy space and increase the bezel size, especially in larger and higher-resolution displays.
Innovation Solution
The display substrate design includes a base with data lines and fan-out traces, where each data line is connected to a fan-out trace at multiple connection nodes in the display region, allowing for efficient routing and reduced bezel size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If fan-out traces are arranged in the peripheral region using existing metal layers, then the display panel can be manufactured with current structure, but the bezel size increases
Solution Approach 1:
The patent introduces a new routing dimension by allowing data lines to extend into the display region and connect to fan-out traces through multiple connection nodes. This transforms the traditional peripheral-only routing into a multi-dimensional arrangement where traces can be positioned both in the peripheral region and within the display region, effectively utilizing space in three dimensions rather than being constrained to a single plane.
Solution Approach 2:
The patent segments the data transmission path into multiple connection nodes along the data line. Instead of a single connection point, the data line is divided into multiple segments with connection nodes distributed at different positions. This segmentation allows the fan-out traces to be distributed across multiple locations rather than concentrated in one area, reducing the bezel size while maintaining manufacturability.
2Measurement precision
If more fan-out traces are added for large size and high resolution displays, then display quality improves, but the bezel size increases
Solution Approach 1:
The patent makes the data lines serve multiple functions: they act as both signal transmission lines for pixel data and as routing paths for fan-out traces. By enabling data lines to connect to fan-out traces at multiple connection nodes, the same data line structure performs dual purposes - driving pixels and routing to fan-out traces - thereby supporting high resolution without proportionally increasing bezel size.
Solution Approach 2:
The patent merges the routing function of data lines with the fan-out trace function. Instead of having separate dedicated paths for data transmission and fan-out connections, the data lines themselves are merged with fan-out trace routing through multiple connection nodes. This consolidation allows more fan-out traces to be accommodated within the same space, supporting high resolution displays with reduced bezel.
3Loss of time
If data lines are connected to fan-out traces at multiple connection nodes, then transmission delay is reduced, but the routing complexity increases
Solution Approach 1:
The patent ensures continuous signal transmission by establishing multiple connection nodes along the data line, each capable of transmitting signals to fan-out traces. This continuous multi-point connection eliminates signal transmission gaps and reduces overall transmission delay, as signals can be transmitted simultaneously through multiple nodes rather than sequentially through a single path.
Solution Approach 2:
The patent applies different connection strategies at different locations along the data line. Not all data lines need the same number of connection nodes, and the positions of connection nodes are optimized locally for each specific routing requirement. This localized optimization reduces overall routing complexity by only adding connection nodes where they provide the most benefit, rather than uniformly increasing complexity across the entire display.
Data Source
AI summary
The present disclosure provides a display substrate and a display device, and belongs to the field of display technology. The display substrate of the present disclosure has a display region, and includes a base and a plurality of data lines and a plurality of fan-out traces on the base; each of the plurality of data lines is connected to a corresponding one of the plurality of fan-out traces at a connection node in the display region; and at least one of the plurality of data lines is connected to a corresponding fan-out trace at a plurality of connection nodes.