Display Substrate Gate Drive Layout for Narrow-Bezel Design

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Solution Overview

Problem

Existing display technologies face challenges in optimizing the layout of gate drive circuits in display substrates, particularly in achieving a narrow bezel design while ensuring efficient signal transmission and reducing space occupation.

Innovation Solution

The display substrate incorporates a gate drive circuit with a plurality of cascaded shift register units, featuring an input control circuit and an output circuit arranged along a specific direction, with transistors and capacitors optimized for space-saving arrangements, allowing for efficient signal control and transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If the gate drive circuit is arranged in the non-display area to enable narrow bezel design, then the bezel width is reduced, but the layout space for the shift register units becomes more constrained

Engineering Contradiction:
Improvebezel widthVSAvoidlayout space for shift register units
Core Design Contradiction:
Length of stationary objectVSArea of stationary object

Solution Approach 1:

The patent applies dimensionality change by transitioning from a conventional linear arrangement of shift register units to a two-dimensional matrix layout. The shift register units are arranged in multiple rows and columns, with first shift register units in a first row and second shift register units in a second row, allowing efficient space utilization in the constrained non-display area while enabling narrow bezel design.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the input control circuit is positioned between the second power supply line and the first control circuit, then the signal transmission path is optimized, but the circuit layout becomes more complex

Engineering Contradiction:
Improvesignal transmission efficiencyVSAvoidcircuit layout complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the control circuit into distinct functional modules: an input control circuit positioned between the second power supply line and the first control circuit, and a output control circuit positioned between the first power supply line and the first output control node. This modular segmentation optimizes signal transmission paths while managing layout complexity through systematic organization of control functions.

Inventive Principle:
Principle #1Segmentation

3Reliability

If the first control circuit controls the voltage of the first output control node, then the signal output is regulated, but the occupation area of the control circuits increases

Engineering Contradiction:
Improvesignal output controlVSAvoidoccupation area of control circuits
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent applies merging by integrating the input control circuit and output control circuit into a unified control structure within the shift register unit. The first control circuit and second control circuit work together to regulate the voltage of the first output control node, combining multiple control functions into a compact arrangement that reduces overall occupation area while maintaining effective signal output control.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12361891B2Display substrate, manufacturing method therefor, and display apparatus
Publication Date: 2025.07.15 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US12361891B2 patent drawing
  • US12361891B2 patent drawing
  • US12361891B2 patent drawing

AI summary

A display substrate is disclosed, including a display area and a non-display area. The non-display area has a gate drive circuit including multiple cascaded shift register units. A shift register unit includes an input control circuit and an output circuit. The input control circuit is electrically connected to a clock signal line group, a first power supply line, a second power supply line and an output circuit, the output circuit is electrically connected to the first power supply line and a second power supply line. The input control circuit at least includes an input circuit and a first control circuit. The clock signal line group, the second power supply line, the input control circuit, the output circuit and the first power supply line are arranged sequentially along a first direction. The input circuit is located between the second power supply line and the first control circuit in the first direction.