Display Substrate Layered Fan-Out Layout for Narrow Lower Bezels

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Solution Overview

Problem

Existing display technologies face challenges in narrowing the bezel width, particularly the lower bezel, due to the need for fan-shaped oblique lines in the fan-out region, which increases the space occupied and makes it difficult to achieve a bezel-less design, especially with increasing screen resolutions.

Innovation Solution

The display substrate design incorporates data connection lines in the display region, eliminating the need for fan-shaped oblique lines in the bonding region, thereby reducing the width of the fan-out region and effectively minimizing the lower bezel width.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If fan-shaped oblique lines are used in the fan-out region for data connection, then the bonding region can be established, but the space occupied increases and the lower bezel width cannot be narrowed

Engineering Contradiction:
Improvelower bezel widthVSAvoidfan-out region space
Core Design Contradiction:
Length of moving objectVSArea of stationary object

Solution Approach 1:

The patent moves the data connection lines from the bonding region (2D plane) into the display region, utilizing the vertical dimension and layer structure. The connection lines are routed through multiple conductive layers (first, second, and third conductive layers) and interconnected via vias, effectively transitioning the connection path from a planar fan-out configuration to a three-dimensional layered structure within the display region.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent embeds the data connection lines within the multi-layer conductive structure of the display device. The first connection line is nested in the base substrate conductive layer, the second connection line is nested in one of the drive circuit layer conductive layers, and they are interconnected through lapping vias that penetrate through intermediate layers, creating a nested, multi-level connection architecture.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Manufacturing precision

If screen resolution is increased, then display quality is improved, but the space occupation increases making bezel-less design difficult

Engineering Contradiction:
Improvescreen resolutionVSAvoidspace occupation
Core Design Contradiction:
Manufacturing precisionVSArea of stationary object

Solution Approach 1:

The patent utilizes the vertical dimension by implementing data connection lines across multiple conductive layers (first, second, and third conductive layers) within the display region. This layered approach allows high-resolution data transmission without requiring increased planar space, as the connections are distributed through the thickness of the device rather than expanding the footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12575281B2Display substrate and preparation method therefor, and display apparatus
Publication Date: 2026.03.10 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US12575281B2 patent drawing
  • US12575281B2 patent drawing
  • US12575281B2 patent drawing

AI summary

Disclosed are a display substrate and a preparation method therefor, and a display apparatus. The display substrate includes a display region and a bezel region, the bezel region includes an upper bezel region and a side bezel region; on a plane perpendicular to the display substrate, the display substrate includes a base substrate and a drive circuit layer, the base substrate includes a base substrate conductive layer disposed between a first flexible layer and a second flexible layer, the base substrate conductive layer includes a first connection line, the drive circuit layer includes a data signal line and a second connection line, the second connection line is connected with the first connection line through a first lapping via, the data signal line is connected with the second connection line through a second lapping via, and the first lapping via is disposed in the upper bezel region.