Display Substrate Lead Layout for Narrow OLED Lower Borders

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current display technologies face challenges in narrowing the lower border of OLED display devices due to the wide fanout area required for data fanout lines, which hinders the implementation of super-narrow bezels and increases the lower border width, making it difficult to achieve a bezel-less design.

Innovation Solution

The display substrate design includes a bonding region with a lead area where lead wires are connected to data lines through data fanout lines, optimizing the layout to reduce the width of the lower border by eliminating oblique fanout lines and using alternating film layers for data fanout lines and lead wires, allowing direct vertical connection of lead wires to the composite circuit area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If data fanout lines are arranged in the bonding region to connect data lines to lead wires, then signal connection is achieved, but the bonding region occupies large space causing wide lower border

Engineering Contradiction:
Improvelower border widthVSAvoidfanout area space occupation
Core Design Contradiction:
Length of moving objectVSDevice complexity

Solution Approach 1:

The patent changes the arrangement dimension of fanout lines from oblique/diagonal to vertical alignment with data lines. By making the fanout lines extend vertically from the data lines to the lead wires, the bonding region is compacted in the horizontal direction, thereby narrowing the lower border width while maintaining all necessary signal connections.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If lead wires and data lines are arranged with overlapping orthographic projections, then space utilization is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvebonding region areaVSAvoidalignment precision between lead wires and data lines
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The patent applies different arrangement strategies to different regions: in the display region, data lines are arranged with specific spacing for optimal display performance; in the bonding region, lead wires are arranged with overlapping orthographic projections to compact the area. The vertical alignment configuration ensures that the overlapping projections maintain clear spatial relationships, making the local quality change manageable within manufacturing precision capabilities.

Inventive Principle:
Principle #3Local quality

3Adaptability or versatility

If oblique fanout lines are used to connect data lines to lead wires, then connection flexibility is improved, but bezel width increases

Engineering Contradiction:
Improveconnection flexibilityVSAvoidbezel width
Core Design Contradiction:
Adaptability or versatilityVSLength of moving object

Solution Approach 1:

Instead of using oblique fanout lines that extend diagonally across the bonding region, the patent inverts the approach by using vertical alignment where fanout lines extend perpendicular to the data lines. This inversion of the fanout line geometry maintains connection flexibility through proper routing while minimizing the horizontal space occupied, thus reducing bezel width.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS12193290B2Display substrate, preparation method thereof, and display device
Publication Date: 2025.01.07 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US12193290B2 patent drawing
  • US12193290B2 patent drawing
  • US12193290B2 patent drawing

AI summary

Provided are a display substrate, a preparation method thereof, and a display device. The display substrate includes a display region and a bonding region on one side of the display region. The bonding region at least includes a lead area; the display region includes a plurality of data lines and a plurality of data fanout lines, the lead area includes a plurality of lead wires, and orthographic projections of the plurality of data lines and the plurality of data fanout lines on a plane of the display substrate are at least partially overlapped. At least one lead wire is connected to the data line through the data fanout line. In the lead area, an orthographic projection of any one of the lead wires on the plane of the display substrate and orthographic projections of other lead wires on the plane of the display substrate have no overlap region.