Display Substrate Light Shielding Pattern for Metal Wire Grid Flatness
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Solution Overview
Problem
In liquid crystal display (LCD) manufacturing, the poor flatness of the flat layer on the color film substrate leads to dimensional deviations and structural losses in the metal wire grid layer, resulting in reduced yield and display issues such as mura (display stripes) due to uneven shrinkage during curing.
Innovation Solution
A display substrate structure is developed with a carrier substrate, adhesive layer, color resist layer, first flat layer, and metal wire grid layer, where the light shielding pattern is between the adhesive and first flat layers, ensuring the surface flatness of the first flat layer is greater proximal to the color resist layer, and optionally including protective and additional flat layers for improved adhesion and planarization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the flat layer is formed on the color film substrate without additional planarization structures, then the manufacturing process is simple, but the flatness of the metal wire grid layer deteriorates leading to dimensional deviations and structural losses
Solution Approach 1:
The patent introduces a light shielding pattern formed before the metal wire grid layer that serves as a preliminary planarization structure. This pattern creates a flat surface for subsequent layer deposition, preventing dimensional deviations and structural losses in the metal wire grid layer while maintaining manufacturing efficiency.
Solution Approach 2:
The light shielding pattern acts as an intermediary structure between the uneven flat layer and the metal wire grid layer. It mediates the surface irregularities by providing a flat reference plane, ensuring precise dimensional control of the metal wire grid layer without requiring complete removal of the underlying uneven structure.
2Manufacturing precision
If the light shielding pattern is positioned closer to the metal wire grid layer, then the flatness and yield of the metal wire grid layer improve, but the risk of crosscolor between adjacent pixels increases
Solution Approach 1:
The patent applies local quality by making the light shielding pattern's surface flatness different from other regions. The area proximal to the metal wire grid layer has superior flatness control, while other areas can have varying flatness characteristics. This localized planarization optimizes metal wire grid layer quality without affecting the entire substrate uniformly, thereby preventing crosscolor issues.
3Manufacturing precision
If multiple flat layers are added to improve planarization, then the flatness and yield increase, but the device complexity and manufacturing steps increase
Solution Approach 1:
The light shielding pattern serves multiple functions simultaneously: it provides light shielding, acts as a planarization structure for the metal wire grid layer, and serves as an adhesive layer substrate. This multi-functionality eliminates the need for separate planarization layers, reducing device complexity while maintaining high flatness and yield.
Solution Approach 2:
The patent merges the light shielding function with the planarization function into a single integrated light shielding pattern structure. By combining these functions, the patent avoids adding separate planarization layers, thereby increasing flatness and yield without proportionally increasing device complexity or manufacturing steps.
Data Source
AI summary
Disclosed are a display substrate and a method for manufacturing the same, a display panel and a display device. The display panel includes a carrier substrate; an adhesive layer, a color resist layer, a first flat layer and a metal wire grid layer that are distributed in a direction distal from the carrier substrate; and a light shielding pattern disposed between the adhesive layer and the first flat layer. A surface of the light shielding pattern proximal to the metal wire grid layer is in the same plane as a surface of the color resist layer proximal to the metal wire grid layer. The present disclosure contributes to increasing the yield of the metal wire grid layer and improving the display effect of the display panel.


