Display Substrate Power Mesh for Uniform AMOLED Sub-Pixels

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Solution Overview

Problem

Existing AMOLED display devices face issues with insufficient data writing time in high-frequency driving modes and poor display uniformity due to independent power signal lines in sub-pixels.

Innovation Solution

The display substrate design includes alternating data line patterns for adjacent sub-pixels in the same column, with integrated power signal line and compensation patterns on the same layer, forming a mesh structure to ensure adequate data writing time and improve display uniformity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If high-frequency driving mode is adopted to reduce data writing time per row, then productivity is improved, but data writing time for each sub-pixel becomes insufficient

Engineering Contradiction:
Improvedata writing speedVSAvoiddata writing time
Core Design Contradiction:
ProductivityVSDuration of action of moving object

Solution Approach 1:

The patent divides the data writing process into two separate phases: a first data writing period during which data signals are written to storage capacitors, and a second data writing period during which data signals are written to light emitting elements. This segmentation allows each phase to be optimized independently, enabling high-frequency driving while ensuring sufficient time for both storage capacitor charging and element activation.

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If independent power signal lines are used in each sub-pixel, then ease of manufacture is improved, but display uniformity deteriorates due to signal interference

Engineering Contradiction:
Improvepower signal line fabricationVSAvoiddisplay uniformity
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

Adjacent sub-pixels share common power signal lines (ELVDD and ELVSS) instead of using independent power lines for each sub-pixel. This merging approach reduces the total number of power signal lines, simplifies the manufacturing process, and eliminates signal interference between adjacent sub-pixels, thereby improving display uniformity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces a compensation capacitor connected between the gate electrode and the power signal line in another dimension (electrical connection dimension). This compensation capacitor compensates for voltage drops and signal interference on the shared power signal lines, ensuring stable power supply and improving display uniformity while maintaining the simplified shared power line structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Device complexity

If data line patterns are arranged traditionally, then device complexity is reduced, but dynamic crosstalk increases affecting image quality

Engineering Contradiction:
Improvedata line arrangementVSAvoiddynamic crosstalk
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The patent implements alternating data line patterns where odd-numbered sub-pixels use first data lines and even-numbered sub-pixels use second data lines. This local differentiation in data line assignment reduces dynamic crosstalk between adjacent sub-pixels by ensuring that neighboring pixels are driven by separate data lines, improving image quality while maintaining manageable device complexity.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12451077B2Display substrate and display device
Publication Date: 2025.10.21 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US12451077B2 patent drawing
  • US12451077B2 patent drawing
  • US12451077B2 patent drawing

AI summary

A display substrate, a method for manufacturing the display substrate, and a display device. In the display substrate, the first sub-pixel and the second sub-pixel each include: a power signal line pattern, at least part of the power signal line pattern extends along the second direction; and a power compensation pattern, at least part of the power compensation pattern extends along the first direction, the power signal line pattern and the power compensation pattern are both located on a side of the first data line pattern and the second data line pattern close to the substrate; the power compensation pattern is electrically connected to the power signal line pattern and a power signal line pattern in an adjacent sub-pixel along the first direction.