Display Substrate Scan Circuit Layout for Narrow Frame Width

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Solution Overview

Problem

The existing AMOLED display panels face challenges in minimizing the frame width due to the arrangement of the scan driving circuit in the edge area, which affects the compactness and efficiency of the display substrate.

Innovation Solution

The display substrate incorporates a scan driving circuit with a specific layout, including shift register units with output circuits containing output transistors and reset transistors, where the active layers are arranged along a first direction, and the ratio of the output active length to the minimum output active width is within a predetermined range of 3 to 11, optimizing the space usage and reducing the frame width.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the scan driving circuit is arranged in the edge area of the AMOLED display panel, then the frame width is determined by this arrangement, but the frame width cannot be minimized

Engineering Contradiction:
Improveframe widthVSAvoidarrangement of scan driving circuit
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent changes the arrangement dimension of the scan driving circuit from traditional edge-area placement to placement along the data line direction. By extending the shift register units along the data line direction and utilizing the space between data lines, the circuit is redistributed from a two-dimensional edge block to a one-dimensional linear arrangement that follows the data line pattern, thereby minimizing frame width occupation.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent applies different arrangement strategies to different parts of the scan driving circuit. The shift register units are arranged with their active layers extending along the data line direction, while the electrode plates are arranged along the gate line direction. This localized differentiation of arrangement orientations allows optimal space utilization in different regions, minimizing the overall frame width while maintaining circuit functionality.

Inventive Principle:
Principle #3Local quality

2Area of stationary object

If the active layers of output transistor and output reset transistor are arranged along the first direction with optimized length and width ratio, then the area occupied by shift register unit is reduced, but the manufacturing precision requirement increases

Engineering Contradiction:
Improvearea occupied by shift register unitVSAvoidratio of output active length to first output active width
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The patent optimizes the geometric parameters of the active layers by establishing a specific ratio range (3:1 to 11:1) between the output active length (along data line direction) and the first output active width (along gate line direction). This parameter optimization allows the active layers to be elongated in the data line direction, reducing the width dimension that contributes to frame width, while maintaining manufacturability within the specified ratio range.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs asymmetric arrangement of the active layers, where the output transistor and output reset transistor active layers have different length-to-width ratios optimized for their specific functions. The asymmetric orientation along the first direction (data line direction) versus the second direction (gate line direction) allows tailored space utilization that minimizes frame width while accommodating the different electrical requirements of output and reset transistors.

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS12293725B2Display substrate, manufacturing method thereof, and display device
Publication Date: 2025.05.06 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US12293725B2 patent drawing
  • US12293725B2 patent drawing
  • US12293725B2 patent drawing

AI summary

A display substrate, a manufacturing method and a display device are provided. At least one of the plurality of shift register units in the scan driving circuit includes an output circuit including an output transistor and an output reset transistor; a length of the active layer of the output transistor/the output reset transistor in the first direction is a first length/a second length, and a sum thereof is an output active length; a smaller one of minimum width of the active layer of the output transistor and the output reset transistor in a second direction is a first output active width, the first direction intersects the second direction; a ratio of the output active length to the first output active width is within a first predetermined ratio range greater than or equal to 3 and less than or equal to 11.