Display Substrate Layout for Side-Bezel Test Units
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Solution Overview
Problem
In OLED display panels, the placement of test units on the top bezel leads to increased circuit impedance, affecting signal driving capability and limiting the narrow bezel design, while also causing voltage drops due to cross-layer jumpers, which impacts display uniformity and power consumption.
Innovation Solution
The display substrate design positions test units on the side of the data lines away from the display region, with connecting parts between power supply buses, reducing circuit impedance and parasitic capacitance, and optimizing the layout to enhance signal driving capability and facilitate a narrow bezel design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If test units are placed on the top bezel, then test functionality is achieved, but circuit impedance increases and signal driving capability deteriorates
Solution Approach 1:
The test units are extracted from the top bezel location and relocated to the side bezel region. This spatial extraction removes the harmful impact of test units on the display region's signal integrity while preserving test functionality. The test units are positioned adjacent to the data lines in the side bezel, allowing test signal injection without interfering with the main display area.
Solution Approach 2:
The test unit placement transitions from a vertical arrangement (top bezel) to a horizontal arrangement (side bezel). This dimensional change in positioning allows the test units to access data lines through the side region, reducing the path length and impedance impact on vertical signal transmission to the display region.
2Reliability
If test units are placed on the top bezel, then test functionality is achieved, but bezel width increases
Solution Approach 1:
The test units are extracted from the top bezel region and relocated to the side bezel region. This extraction allows the top bezel to be narrowed or eliminated, as test functionality is now provided through the side bezel placement, thereby reducing the overall top bezel width.
Solution Approach 2:
The test unit positioning shifts from the vertical dimension (top bezel) to the horizontal dimension (side bezel). This dimensional shift enables the test functionality to be accommodated in the side region, allowing for a narrower top bezel design while maintaining all necessary test capabilities.
3Power
If cross-layer jumpers are used for power supply, then power supply is achieved, but voltage drops occur and display uniformity deteriorates
Solution Approach 1:
The power supply connection path is extracted from a cross-layer vertical path to a lateral path within the same layer. By positioning the test units and their power supply connections in the side bezel region, the design eliminates the need for long cross-layer jumper connections, thereby reducing resistance and voltage drops.
Solution Approach 2:
The power supply connection transitions from a vertical cross-layer path to a horizontal within-layer path. This dimensional change in the connection route reduces the length and number of layers traversed, minimizing parasitic resistance and voltage drops while maintaining adequate power supply to the test units.
4Reliability
If test units are placed on the top bezel, then test functionality is achieved, but power consumption increases
Solution Approach 1:
The test units are extracted from the top bezel and relocated to the side bezel region. This extraction shortens the signal and power supply path lengths, reducing the energy required for signal transmission and thereby lowering overall power consumption while maintaining test functionality.
Solution Approach 2:
The relocation from vertical to horizontal positioning reduces the distance that signals and power must travel through high-impedance paths. This dimensional change decreases the energy loss in the form of heat due to resistance, thereby reducing power consumption.
Data Source
AI summary
A display substrate and a display apparatus are provided, the display substrate includes a base substrate including a display region and a peripheral region; the display region includes multiple sub-pixels, multiple data lines and multiple power supply lines; the peripheral region includes at least one test data signal line, at least one test control signal line and multiple test units, the multiple test units are at a side of the multiple data lines away from the display region, and at least one of the multiple test units is electrically connected with at least one of the multiple data lines, the at least one test data signal line, and the at least one test control signal line; the peripheral region further includes a first power supply bus and multiple connecting parts, the first power supply bus is at a side of the multiple test units away from the display region.