Display Substrate Signal Line Layout for Narrow-Bezel High Resolution
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Solution Overview
Problem
Narrow-bezel display products with high resolution face challenges in providing sufficient wiring space for signal lines due to the limitations of single-layer or double-layer alternating wiring, leading to increased capacitance and reduced charging rates of pixels.
Innovation Solution
A display substrate design with alternating and overlapping signal lines in different layers, where the number of signal lines decreases in one direction, allowing for efficient use of wiring space and reducing capacitance by alternating arrangements in specific regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If single-layer wiring or double-layer alternating wiring is used in narrow-bezel high-resolution display products, then the wiring structure is simple, but the wiring space is insufficient and capacitance increases
Solution Approach 1:
The patent transitions from planar single-layer or double-layer alternating wiring to three-dimensional overlapping wiring, where signal lines in different layers overlap in the vertical dimension. This allows multiple signal lines to occupy the same horizontal footprint while being separated vertically, dramatically increasing wiring capacity within the constrained bezel area without proportionally increasing structural complexity
Solution Approach 2:
The patent implements nested wiring structures where signal lines are arranged in overlapping layers, with upper-layer signal lines positioned directly above or alongside lower-layer signal lines. This nesting approach maximizes the use of available vertical space within the bezel region, allowing dense packing of signal lines while maintaining electrical isolation through insulating layers
2Measurement precision
If the number of signal lines is increased to meet high-resolution requirements, then the display resolution is improved, but the wiring space requirement increases and capacitance rises
Solution Approach 1:
By utilizing vertical layering and overlapping arrangements, the patent enables a greater number of signal lines to be packed into the same horizontal area. The overlapping wiring structure allows signal lines serving different pixel columns to be routed through the same horizontal corridor at different vertical levels, effectively multiplying the wiring capacity without expanding the horizontal footprint
Solution Approach 2:
The patent merges the routing paths of multiple signal lines by allowing them to overlap and share the same horizontal corridor. Different signal lines that would traditionally require separate parallel corridors are instead combined into shared overlapping paths, reducing the total horizontal space required while maintaining electrical isolation through insulating layers between overlapping segments
3Measurement precision
If the number of signal lines is increased for high resolution, then the display quality is improved, but the pixel charging rate decreases due to increased capacitance
Solution Approach 1:
The patent applies alternating wiring arrangements in specific local regions where signal line density is highest, while using overlapping wiring in other regions. This localized optimization reduces capacitance in critical areas by alternating the positions of signal lines in upper and lower layers, thereby minimizing parasitic coupling effects and improving pixel charging rates where it matters most
Solution Approach 2:
By routing signal lines through multiple vertical layers with overlapping horizontal projections, the patent reduces the horizontal spacing requirements between adjacent signal lines. This vertical separation through insulating layers minimizes parasitic capacitance between neighboring signal lines, thereby improving pixel charging rates while maintaining high signal line density required for high-resolution displays
Data Source
AI summary
A display substrate and a display device. The display substrate includes: a first base substrate, including a display region, a first peripheral region; a signal line group, including signal lines. The signal lines includes first and second signal lines. The signal line group includes a first region and a second region arranged in an extension direction of the signal line group. The number of signal lines in the first region is greater than the number of signal lines in the second region. In the first region, orthographic projections of the first signal lines overlaps orthographic projections of the second signal lines on the first base substrate. In the second region, the first and second signal lines are alternately arranged. The first region includes sub-regions.