Display Substrate Storage Capacitor Via Openings
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Solution Overview
Problem
In high-resolution display substrates, the overlap between storage capacitors and pixel transistors can lead to short circuits due to voltage differences, reducing product quality and increasing the risk of failures at connection vias.
Innovation Solution
The display substrate design includes a storage capacitor with a first plate that is insulated and overlapped with the pixel transistor electrodes in a perpendicular direction, featuring openings at positions corresponding to connection vias to minimize overlap and prevent short circuits, while maintaining a larger storage area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the area of the first plate of the storage capacitor is increased to increase storage capacitance, then the storage performance is improved, but the overlap with connection vias increases causing short circuits and reducing product quality
Solution Approach 1:
The first plate of the storage capacitor is segmented by introducing openings (first openings and second openings) at specific positions corresponding to connection vias. This segmentation allows the plate to maintain large overall area for sufficient capacitance while creating localized gaps that prevent short circuits with underlying connection vias, thus resolving the contradiction between storage performance and short circuit risk
Solution Approach 2:
The first plate is designed with non-uniform structure by adding openings only at positions where connection vias are located, while maintaining continuous coverage in other areas. This local modification approach ensures that the plate provides sufficient capacitance storage in most regions while preventing harmful short circuits only at critical locations where vias pass through
2Measurement precision
If the resolution of the display is improved by reducing pixel region area, then the display quality is enhanced, but the storage capacitor area must be increased which causes overlapping with pixel transistors
Solution Approach 1:
The storage capacitor is designed to overlap with the pixel transistor in the vertical dimension (perpendicular to the substrate) rather than requiring lateral separation. The first plate is positioned at a different vertical level and insulated from the transistor electrodes, allowing the capacitor to achieve sufficient area without increasing lateral footprint, thus enabling high resolution display while maintaining adequate storage capacitance
3Area of stationary object
If the first plate is positioned to overlap with pixel transistor electrodes for compact design, then the device area is reduced, but short circuits occur due to voltage differences between the capacitor and transistor
Solution Approach 1:
An insulating layer is introduced as an intermediary between the first plate of the storage capacitor and the electrodes of the pixel transistor. This insulating layer allows the first plate to be positioned close to or overlapping with transistor electrodes for compact design, while simultaneously providing electrical isolation to prevent short circuits caused by voltage differences, thus resolving the contradiction between compact area and electrical insulation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances storage performance and reduces the risk of short circuits, thereby improving product quality by ensuring minimal overlap between the storage capacitor and connection vias.
Implementation Method 1
a first electron transport layer between the cathode and the first light-emitting layer
Implementation Method 2
a second electron transport layer between the second light-emitting layer and the first electron transport layer
Data Source
Figure 1~2
Figure 3~4
Figure 5~6
AI summary
The present disclosure provides a display substrate and a manufacturing method thereof, and a display device. The display substrate includes a plurality of pixel regions, each of the pixel regions including a display region provided with a pixel electrode and a driving region provided with a pixel circuit. The pixel circuit includes at least one pixel transistor having a first electrode and a second electrode which are coupled to an active layer of the at least one pixel transistor through connection vias, respectively. The driving region is further provided with a first plate of a storage capacitor, the first plate is insulated from and overlapped with the first electrode and the second electrode of the pixel transistor in a direction perpendicular to the display substrate, and the first plate is provided with openings at positions corresponding to at least some of the connection vias.