Display Substrate Single Test Line for Wiring and Pixel Inspection
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Solution Overview
Problem
Conventional methods for testing display substrates require additional test lines and complex processes, leading to increased manufacturing costs and reduced yield due to defects like wiring failures and particle contamination.
Innovation Solution
A display substrate design with gate and data lines, gate and data signal-inputting units, and dummy switching units that allow for testing using a single test line, simplifying the inspection process and improving detection accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional array test lines and visual test lines are formed in conventional methods, then testing capability is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The test line is designed to serve multiple functions: it can test both array substrate wiring and display pixel functionality. By making the test line universal, the patent eliminates the need for separate array test lines and visual test lines, thereby reducing structural complexity while maintaining comprehensive testing capability
Solution Approach 2:
The patent combines the functions of array testing and visual testing into a single integrated test line. This merging of testing functions allows one test line to perform what traditionally required multiple separate test lines, reducing overall device complexity
2Reliability
If additional array test lines and visual test lines are formed in conventional methods, then testing capability is improved, but manufacturing cost increases
Solution Approach 1:
The test line is designed to serve multiple functions: it can test both array substrate wiring and display pixel functionality. By making the test line universal, the patent eliminates the need for separate array test lines and visual test lines, thereby reducing structural complexity while maintaining comprehensive testing capability
Solution Approach 2:
The patent combines the functions of array testing and visual testing into a single integrated test line. This merging of testing functions allows one test line to perform what traditionally required multiple separate test lines, reducing overall device complexity
3Measurement precision
If base substrate is cut by each display cell after array substrate testing, then inspection accuracy is improved, but loss of time and productivity decrease
Solution Approach 1:
The patent performs preliminary actions by testing array substrate wiring and display pixels in advance through the integrated test line before final assembly. This allows defects to be detected early, eliminating the need for time-consuming post-assembly cutting and retesting operations
4Measurement precision
If different electrical signals are applied to wirings for detecting display failures, then detection precision is improved, but device complexity increases
Solution Approach 1:
The test line is designed to serve multiple functions: it can test both array substrate wiring and display pixel functionality. By making the test line universal, the patent eliminates the need for separate array test lines and visual test lines, thereby reducing structural complexity while maintaining comprehensive testing capability
Data Source
AI summary
A display substrate includes a plurality of gate lines, a plurality of data lines, a gate signal-inputting unit, a first test unit, and a first dummy switching unit. The gate lines extend in a first direction. The data lines extend in a second direction intersected with the first direction. The gate signal-inputting unit is formed at a first end of each of the gate lines to apply gate signals to the gate lines. The first test unit is formed at a second end of each of the gate lines opposite to the first end applying a first test signal to the gate lines. The first dummy switching unit is formed between the gate signal-inputting unit and the first test unit and transferring the first test signal to the gate lines.