Display Substrate Via-Hole Interconnect for Narrow Frame Resistance
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Solution Overview
Problem
The existing display substrates face challenges in reducing the size of the non-display area while maintaining low signal line resistance, which affects the display effect due to increased resistance as the signal line width narrows.
Innovation Solution
A display substrate design featuring a conductive layer with parallel first and second conductive patterns, connected via via-holes in the intermediate insulating layer, and signal lines in the metal layer, which reduces signal line resistance by connecting each signal line to a conductive structure in parallel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the non-display area size is reduced to achieve narrow frame design, then the display area ratio is improved, but the signal line resistance increases
Solution Approach 1:
The patent transitions from a planar signal line structure to a three-dimensional laminated structure by stacking conductive layers vertically. Multiple conductive patterns are arranged in different layers (first conductive pattern in conductive layer, second conductive pattern in metal layer) and connected through via-holes, creating a vertical dimension that reduces resistance without increasing horizontal area
Solution Approach 2:
The patent employs composite structures combining different materials and layers: conductive layer with conductive material, intermediate insulating layer with via-holes, and metal layer with signal lines. This multi-material composite approach enables both space efficiency and electrical performance by optimizing each layer's function
2Length of moving object
If the signal line width is narrowed to reduce non-display area, then the frame size is reduced, but the resistance increases affecting display effect
Solution Approach 1:
The patent compensates for reduced signal line width by adding vertical stacking dimensions. Instead of relying solely on horizontal width, the conductive paths are extended into the vertical dimension through multiple laminated layers connected by via-holes, maintaining low resistance despite narrower in-plane dimensions
Solution Approach 2:
The signal transmission path is segmented into multiple discrete conductive patterns across different layers (first conductive pattern, second conductive pattern) connected through via-holes. This segmentation allows each segment to be optimized independently while collectively achieving low overall resistance in a compact footprint
Data Source
AI summary
Provided are a display substrate and a manufacturing method thereof, and a display device. The display substrate includes: a base substrate, and a conductive layer, an intermediate insulating layer, and a metal layer that are sequentially laminated on the base substrate. The conductive layer includes a first conductive pattern and a second conductive pattern at an interval; the intermediate insulating layer has a first via-hole and a second via-hole; and the metal layer includes a first signal line and a second signal line at an interval, wherein the first signal line is connected to the first conductive pattern through the first via-hole, and the second signal line is connected to the second conductive pattern through the second via-hole. Since the conductive pattern connected to the signal line is capable of effectively reducing the resistance of the signal line, the display effect of the display device is improved.