Display Substrate Wiring Layout for Narrow-Bezel, Uniform Displays

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Solution Overview

Problem

Existing display technologies face challenges in achieving narrow bezel and full-screen displays due to inefficient wiring designs around display regions, leading to uneven display and reduced display area.

Innovation Solution

A display substrate design with signal lines arranged in different layers and connected using specific connection lines that overlap and extend in different directions, reducing wiring space around display regions and minimizing load changes, thereby increasing the display area and improving display quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If signal lines are arranged in conventional single-layer design, then wiring space is sufficient, but display area is reduced and uneven display occurs

Engineering Contradiction:
Improvedisplay areaVSAvoidwiring structure complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent transitions from conventional single-layer signal line arrangement to a multi-layer wiring structure. First signal lines and second signal lines are arranged in different layers, with connection lines extending in different directions to connect corresponding signal lines. This spatial dimensionality change increases the display area by reducing wiring space occupation while maintaining electrical connectivity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The signal lines are segmented into first signal lines and second signal lines located in different layers. Each layer handles specific signal routing functions, with connection lines providing vertical inter-layer connectivity. This segmentation allows optimized routing paths that reduce overall wiring space and eliminate display uniformity issues.

Inventive Principle:
Principle #1Segmentation

2Area of stationary object

If wiring space is reduced to increase display area, then display area increases, but load changes become uneven causing mura

Engineering Contradiction:
Improvedisplay areaVSAvoiddisplay uniformity
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent implements asymmetric arrangement of connection lines with different minimum distances from the second region edge. First connection lines have a first minimum distance while second connection lines have a second minimum distance, creating localized variations in wiring capacitance. This local quality differentiation compensates for load changes and maintains display uniformity across the reduced wiring space.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The wiring structure employs asymmetric design where first signal lines and second signal lines are positioned at different locations in their respective layers, and connection lines extend in different directions with unequal spacing. This asymmetric arrangement balances the electrical load distribution across the display panel, preventing mura effects even with reduced overall wiring space.

Inventive Principle:
Principle #4Asymmetry

3Ease of manufacture

If connection lines are arranged symmetrically, then manufacturing is simplified, but wiring space efficiency is reduced

Engineering Contradiction:
Improvewiring arrangement simplicityVSAvoidwiring space
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The patent employs asymmetric arrangement of connection lines where first connection lines extending in a first direction have different spacing characteristics compared to second connection lines extending in a second direction. The minimum distances from the second region edge are deliberately made different to optimize wiring space utilization while maintaining manufacturability through systematic asymmetric patterning.

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS20250248246A1Display substrate and display apparatus
Publication Date: 2025.07.31 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US20250248246A1 patent drawing
  • US20250248246A1 patent drawing
  • US20250248246A1 patent drawing

AI summary

A display substrate and a display apparatus are provided. The display substrate includes a first region and a second region surrounded by the first region. The display substrate includes first signal lines and second signal lines extending along different directions. The first signal line includes a first sub-signal line and a second sub-signal line located on both sides of the second region and are electrically connected through a first connection line and a second connection line extending in different directions; the second signal line includes a third sub-signal line and a fourth sub-signal line located on both sides of the second region and are electrically connected through a third connection line overlapped with the second connection line and a fourth connection line extending in different directions; and at least one first connection line is farther from the second region than at least one third connection line.