Display Panel Test Pad Layout With Local ESD Protection

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Solution Overview

Problem

Conventional display panels are susceptible to electrostatic discharge (ESD) damage due to exposed testing terminals, leading to reduced quality and reliability.

Innovation Solution

A display panel design incorporating a display area and a non-display area with signal lines, test lines, test pads, and electrostatic protection units, including thin-film transistors and capacitors, to protect circuits from ESD by channeling static electricity through a common line.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If testing terminals are exposed for easy access during testing, then testing convenience is improved, but susceptibility to ESD damage increases

Engineering Contradiction:
Improvetesting convenienceVSAvoidresistance to ESD damage
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent introduces electrostatic protection circuits as intermediary components between the exposed test terminals and the internal circuitry. These protection circuits include ESD protection transistors and capacitors that act as mediators to capture and dissipate electrostatic charges before they can damage sensitive internal components, thus allowing terminals to remain exposed for testing convenience while protecting against ESD damage

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements ESD protection circuits in advance before the actual testing operation. The protection circuits are pre-configured with appropriate capacitance values and transistor configurations to cushion against potential ESD events that may occur during testing, ensuring that when electrostatic discharge occurs, the damage is prevented or minimized

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If ESD protection circuits are added to protect circuits, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveprotection from ESD damageVSAvoidcircuit structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies ESD protection circuits locally at specific test terminals rather than throughout the entire display panel. Each protection circuit is strategically placed only where test terminals are exposed and vulnerable to ESD, using localized protection transistors and capacitors with specific capacitance values tailored to the local testing requirements, thus providing necessary protection while minimizing overall complexity

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent divides the ESD protection system into multiple independent protection circuits, each serving specific test terminals. Rather than implementing a single complex protection mechanism for all terminals, the system segments protection into multiple simple, modular circuits that can be independently configured and optimized, reducing overall system complexity while maintaining comprehensive protection

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively reduces conduction impedance and prevents ESD damage, enhancing the quality and reliability of the display panel by protecting the circuitry during testing.

Implementation Method 1

there is a buildup of electrostatic charge and electrostatic discharge (ESD), leading to the occurrence of ESD damage

Methodology Applied
Scientific EffectElectrostatic discharge: Electrostatic Discharge

Implementation Method 2

a first capacitor, one end of the first capacitor electrically connected to a gate of the thin-film transistor, another end of the first capacitor electrically connected to a first output terminal and a source of the thin-film transistor; and a second capacitor

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS12525158B2Display panel
Publication Date: 2026.01.13 SHENZHEN CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
  • US12525158B2 patent drawing
  • US12525158B2 patent drawing
  • US12525158B2 patent drawing

AI summary

A display panel is provided, including a display area, a non-display area, signal lines arranged in the display area, test pads, test lines arranged in the non-display area, and first electrostatic protection units. Each test line is electrically connected to each respective signal line. One end of each test pad is electrically connected to each respective test line. Another end of each test pad is electrically connected to a common line. One end of each first electrostatic protection unit is connected to the corresponding test pad, and another end of each first electrostatic protection unit is electrically connected to the common line. By placing the first electrostatic protection units on one side of the test pads away from the display area, when testing the display panel through the test pads, the first electrostatic protection units effectively protect circuits of the display panel and prevent issues such as ESD electrostatic damage.