Display Panel TFT-Capacitor Layout With Fewer Mask Steps
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Solution Overview
Problem
The manufacturing process of display devices requires a large number of masks, leading to increased costs and reduced process efficiency.
Innovation Solution
A display device design that includes a method of forming transistors and capacitors using different semiconductor layers, where the channels are formed of different semiconductor materials, and the use of a capping film and gate insulating films to align the semiconductor patterns, allowing for the reduction of the number of masks needed in the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional manufacturing processes are used with multiple masks, then manufacturing precision can be maintained, but the number of masks increases leading to higher costs and reduced productivity
Solution Approach 1:
The patent combines the formation of gate insulating films and semiconductor patterns into a single integrated process step. The gate insulating film is formed to cover both the first and second semiconductor patterns simultaneously, and subsequent processing steps create both gate electrodes and capacitor electrodes in one mask alignment operation. This merging of previously separate processes reduces the total number of masks required while maintaining precise alignment through the unified structure design.
Solution Approach 2:
The gate insulating film structure serves multiple functions: it acts as the gate insulator for both the first transistor and the capacitor, provides alignment reference for subsequent mask patterns, and enables the formation of both gate electrodes and capacitor electrodes through a single mask process. This multi-functionality reduces the number of specialized masks needed while maintaining manufacturing precision.
2Productivity
If the number of masks is reduced to improve productivity, then manufacturing efficiency increases, but device complexity may increase requiring more sophisticated process design
Solution Approach 1:
The patent segments the device structure into distinct functional regions: a first transistor region with its gate insulating film and semiconductor pattern, and a capacitor region with its gate insulating film and semiconductor pattern. This segmentation allows each region to be optimized independently while being formed through a unified mask process, reducing overall process complexity despite the integrated approach.
Solution Approach 2:
The gate insulating film has different local properties in different regions: in the first transistor region it functions as the gate insulator with specific thickness and material characteristics, while in the capacitor region it serves as the capacitor dielectric with potentially different thickness or material composition. This local quality variation enables the single mask process to create functionally distinct structures without requiring separate specialized masks for each function.
Data Source
AI summary
A display device includes a substrate, a first semiconductor pattern, a first gate insulating film covering the first semiconductor pattern, a first conductive layer and a second semiconductor pattern are on the first gate insulating film, a second gate insulating film on the second semiconductor pattern, a third gate insulating film covering the first gate insulating film and the second gate insulating film, a second conductive layer on the third gate insulating film, an interlayer insulating film covering the second conductive layer, and a third conductive layer on the interlayer insulating film, wherein the first and second semiconductor patterns respectively form semiconductor layers of the first and second transistors, wherein the first conductive layer includes a gate electrode of the first transistor and a first electrode of the capacitor, and wherein the second conductive layer includes a gate electrode of the second transistor and a second electrode of the capacitor.