Display Apparatus Thin Film Transistor Gate Insulator Thickness
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Display apparatuses face issues with parasitic capacitance in sampling transistors, leading to non-uniform initial luminance and decreased luminance reliability, particularly in organic light emitting display devices where oxide semiconductor layers are used.
Innovation Solution
The implementation of a display apparatus with a substrate featuring multiple thin film transistors, including a first thin film transistor with an oxide semiconductor layer, a second thin film transistor with a polycrystalline semiconductor layer, and a third thin film transistor with an oxide semiconductor layer, where the thickness of the gate insulating layers is varied to control the parasitic capacitance and maintain voltage-current characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a sampling transistor with oxide semiconductor layer is used, then leakage current is reduced, but parasitic capacitance increases causing non-uniform initial luminance
Solution Approach 1:
The patent applies different gate insulating layer thicknesses to different transistor types within the same pixel circuit. Specifically, the sampling transistor has a thicker gate insulating layer compared to the driving transistor, creating localized structural differences that reduce parasitic capacitance in the sampling transistor while maintaining performance in the driving transistor. This local differentiation resolves the contradiction by tailoring each component's structure to its specific functional requirements.
Solution Approach 2:
The patent changes the physical parameter of gate insulating layer thickness to control parasitic capacitance. By increasing the thickness of the gate insulating layer in the sampling transistor, the parasitic capacitance is reduced, which improves initial luminance uniformity. This parameter modification allows the sampling transistor to maintain low leakage current while avoiding the capacitance-related issues that would otherwise cause non-uniform display characteristics.
2Manufacturing precision
If gate insulating layer thickness is increased to reduce parasitic capacitance, then initial luminance uniformity improves, but transistor switching speed may decrease
Solution Approach 1:
The patent differentiates gate insulating layer thickness by transistor function: the sampling transistor receives a thicker gate insulating layer to minimize parasitic capacitance and improve luminance uniformity, while the driving transistor maintains a thinner gate insulating layer to preserve fast switching speed. This localized differentiation ensures that each transistor's structural parameters are optimized for its specific operational requirements without compromising overall system performance.
Data Source
AI summary
A display apparatus includes a pixel and four thin film transistors (TFTs). The pixel includes a light emitting element that includes first and second electrodes and a light emitting layer. A first TFT, including a first semiconductor layer, is configured to provide a driving current to the light emitting element according to a data voltage. A second TFT, including a second semiconductor layer, is configured to control driving of the first TFT according to a gate voltage. A third TFT, including a third semiconductor layer, is configured to sense a threshold voltage of the first TFT to control driving of the first TFT. A fourth TFT, including a fourth semiconductor layer, is in the gate driving portion, configured to apply gate voltages to the second and third TFTs, wherein the fourth semiconductor layer is in a different layer from the first, second and third semiconductor layers.