Flexible Display TFT Layout for Low Power and Short Prevention
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Solution Overview
Problem
Current display devices face challenges in achieving low power consumption, especially for portable and wearable devices, where they struggle to balance performance and energy efficiency.
Innovation Solution
The display device incorporates a combination of thin film transistors with polycrystalline semiconductor and oxide semiconductor layers, along with a specific layout for supply lines and signal links to minimize power consumption and simplify the manufacturing process, including forming openings and contact holes through the same process to enhance flexibility and reduce stress on the substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If display devices use conventional transistor structures and layouts, then manufacturing processes are simpler, but power consumption is high
Solution Approach 1:
The display device uses different transistor structures in different regions: first thin film transistors with polycrystalline semiconductor layers in the active area, and second thin film transistors with oxide semiconductor layers in the bending area. This segmentation allows optimization for low power consumption in the bending area while maintaining performance in the active area.
Solution Approach 2:
Different semiconductor materials are used in different locations based on functional requirements. The oxide semiconductor layer is specifically used in the bending area where low power consumption is critical, while polycrystalline semiconductor is used in the active area where high performance is needed.
2Ease of manufacture
If openings in bending area and contact holes in active area are formed through separate processes, then manufacturing precision is higher, but manufacturing complexity increases
Solution Approach 1:
The patent combines the formation of openings in the bending area and contact holes in the active area into a single manufacturing process step. This is achieved by designing the bending area structures to align with the contact hole pattern, allowing both to be formed simultaneously through the same etching process, thereby simplifying manufacturing while maintaining precision.
3Area of stationary object
If high-potential and low-potential supply lines are placed close together, then area is reduced, but signal line shorting risk increases
Solution Approach 1:
The patent arranges high-potential and low-potential supply lines in different spatial dimensions and orientations. High-potential supply lines extend in the first direction while low-potential supply lines extend in the second direction, creating a staggered, non-overlapping configuration that reduces shorting risk while minimizing area usage.
4Weight of moving object
If display devices are made thinner and more flexible, then portability is improved, but structural strength decreases
Solution Approach 1:
The patent employs composite material structures including multiple buffer layers (first and second buffer layers), different semiconductor layer types (polycrystalline and oxide), and layered transistor configurations. These composite structures provide mechanical strength and flexibility simultaneously, enabling thin, portable display devices that can withstand bending stresses.
Data Source
AI summary
Disclosed is a display device that with low power consumption. The display device includes a first thin film transistor having a polycrystalline semiconductor layer in an active area and a second thin film transistor having an oxide semiconductor layer in the active area, wherein at least one opening disposed in a bending area has the same depth as one of a plurality of contact holes disposed in the active area, whereby the opening and the contact holes are formed through the same process, and the process is therefore simplified, and wherein a high-potential supply line and a low-potential supply line are disposed so as to be spaced apart from each other in the horizontal direction, whereas a reference line and the low-potential supply line are disposed so as to overlap each other, thereby preventing signal lines from being shorted.