Display Device Through-Hole Taper Angles for Wiring Reliability
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Solution Overview
Problem
The existing methods for manufacturing display devices, such as liquid crystal display devices, involve a high number of photolithography processes, which can lead to crack formation and connection failures in the wiring portions due to insufficient coverage and shorting at the edges of the gate through-holes.
Innovation Solution
A display device with a through-hole structure featuring specific taper angles and dimensions, including a first taper angle greater than a second taper angle, and a third taper angle greater than the second, with the second taper angle being 10° or less, and a diameter of 7.6 μm or less, is used to reduce the aspect ratio and improve coverage, thereby preventing contact failures and shorts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If multiple photolithography processes are used to form gate through-holes, then the through-holes can be formed with conventional methods, but the number of manufacturing processes increases and productivity decreases
Solution Approach 1:
The patent combines the formation of gate through-holes with the existing photolithography process used for forming TFT patterns. By using the same photolithography step to create both the TFT active area patterns and the gate through-hole patterns, the number of separate photolithography processes is reduced, thereby improving productivity while maintaining manufacturing feasibility.
2Ease of manufacture
If conventional photolithography processes are used to form gate through-holes, then through-holes can be created, but crack formation and connection failures occur due to insufficient coverage
Solution Approach 1:
The patent applies different etching conditions to different regions during the photolithography process. By controlling the etching parameters locally, gate through-holes are formed with improved coverage and reduced aspect ratios in critical areas, preventing crack formation and connection failures while maintaining the simplicity of the overall manufacturing process.
3Ease of manufacture
If standard through-hole formation methods are used, then gate through-holes can be formed, but shorts occur at the edges of the through-holes
Solution Approach 1:
The patent modifies the etching parameters during the photolithography process to control the formation of gate through-holes. By adjusting etching conditions such as etchant concentration, exposure time, and temperature, the aspect ratio of through-holes is reduced and edge precision is improved, preventing shorts while maintaining ease of manufacture.
4Ease of manufacture
If multiple photolithography processes are used, then gate through-holes can be formed with conventional methods, but manufacturing time increases
Solution Approach 1:
The patent merges the gate through-hole formation step with the existing TFT pattern formation photolithography process. This integration eliminates the need for separate photolithography steps, reducing total manufacturing time while maintaining the simplicity and conventional nature of the manufacturing method.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the number of photolithography processes, enhances the reliability of connections by minimizing crack formation and shorts, and improves productivity by about 12% to 20%, while ensuring effective coverage of the wiring portion.
Implementation Method 1
a metal layer formed of Al or Mo is deposited on the glass substrate 701 using a sputtering apparatus
Implementation Method 2
a well-known photolithography process and an etching process
Implementation Method 3
the gate insulating film 706 in the area corresponding to the gate through-hole 703 is removed by etching
Data Source
AI summary
A display device includes an electrode layer formed at a predetermined position on a substrate, an insulating film having a through-hole formed on the top of the electrode layer, and a wiring film connected to the electrode layer via the through-hole formed in the insulating film. Based on a surface of the substrate, the through-hole includes a first taper portion having a first taper angle, a second taper portion formed higher than the first taper portion and having a second taper angle different from the first taper angle, and a third taper portion formed higher than the second taper portion and having a third taper angle different from the second taper angle.


