Display Timing Control Circuit Pause Mode Transition
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Solution Overview
Problem
Existing display apparatuses take a longer time to transition from a pause mode to a display mode, resulting in a delay in displaying images on the panel after receiving a control signal.
Innovation Solution
The display apparatus includes a display panel, a display driving circuit, a timing control circuit, and a power control circuit. Upon receiving a control signal to transition from the pause mode to the display mode, the timing control circuit stops transmitting a pause signal to the power control circuit, allowing the display driving circuit to resume supplying driving signals to the display panel, thereby reducing the time taken to display images.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If all components (display panel, display driving circuit, timing control circuit) are suspended in power-off state during pause mode, then power consumption is reduced, but the transition time to display mode increases
Solution Approach 1:
The power supply is segmented into multiple independent circuits: a first power supply circuit that continuously supplies power to the timing control circuit, and second/power-off circuits that can be selectively activated. This segmentation allows the timing control circuit to remain operational during pause mode while other components are powered down, thereby reducing power consumption without increasing transition time.
Solution Approach 2:
The timing control circuit performs preliminary actions by remaining in a powered-on state during pause mode, maintaining its operational readiness. This preliminary preparation ensures that when the display mode is activated, the timing control circuit can immediately resume its functions without requiring startup time, thus reducing the overall transition time while still achieving power savings through selective powering down of other components.
2Loss of energy
If display driving circuit and timing control circuit are completely powered off in pause mode, then power saving is achieved, but image display responsiveness deteriorates
Solution Approach 1:
The power distribution is segmented such that the timing control circuit receives continuous power from a dedicated first power supply circuit, while the display driving circuit and display panel are powered by separate circuits that can be switched off. This segmentation enables the timing control circuit to maintain operational readiness without preventing power savings in other components.
Solution Approach 2:
The first power supply circuit serves multiple functions: it continuously powers the timing control circuit during both display and pause modes, and also activates the second power supply circuit when transitioning to display mode. This multi-functionality ensures responsive image display while maintaining power efficiency during pause mode.
3Loss of energy
If display apparatus transitions to sleep mode after predetermined period without touching operation, then power consumption decreases, but user experience deteriorates due to longer wake-up time
Solution Approach 1:
The power control system is segmented to allow selective powering down of components. The timing control circuit is continuously powered by a dedicated first power supply circuit, while other components are powered by switchable circuits. This enables the display apparatus to enter a low-power state that preserves critical timing functions, resulting in faster wake-up time and improved user experience.
Solution Approach 2:
The timing control circuit maintains a preliminary ready state by remaining powered on during pause mode, anticipating potential user interactions. This preliminary preparation ensures that when a user touches the display or a wake-up event occurs, the system can quickly transition to display mode without requiring full startup sequences, thereby improving ease of operation.
Data Source
AI summary
A display apparatus includes a power control circuit and a timing control circuit that supplies a timing signal to a level shifter circuit. In response to reception of a control signal used to transition from a display mode to a pause mode from a host controller, the timing control circuit causes the level shifter circuit to stop outputting a gate signal by transmitting a pause signal to the power control circuit and stopping supplying the timing signal to the level shifter circuit. In response to reception of the pause signal, the power control circuit stops supplying at least part of power to be supplied to the display panel and the level shifter circuit while keeping supplying power to the timing control circuit.


