Display Panel Timing Control for EMI-Reduced Data Signal Synchronization
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Solution Overview
Problem
High-frequency clock signals in electronic devices generate electromagnetic interference (EMI), which degrades display quality and requires effective mitigation.
Innovation Solution
A display device and electronic device incorporate a timing controller with a spread spectrum clock generator that varies data rates and enable control signal periods to synchronize data signal output, using a data distributor and demultiplexer to reduce EMI by adjusting data rates and control signal timings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high-frequency clock signals are generated to accelerate data processing speed, then productivity is improved, but electromagnetic interference increases
Solution Approach 1:
The patent applies periodic action by implementing spread spectrum clocking that periodically varies the clock signal frequency around a central frequency. This periodic frequency modulation distributes the spectral energy over a wider range, reducing the peak power density at any single frequency and thereby reducing electromagnetic interference while maintaining high data processing speed
Solution Approach 2:
The patent changes the frequency parameter of the clock signal dynamically. By varying the clock frequency within a controlled range (e.g., ±15% of the reference frequency) according to a predetermined pattern, the system achieves spread spectrum clocking that reduces EMI while maintaining adequate data transmission speed for high productivity
2Object-generated harmful factors
If data rate is varied to reduce EMI, then electromagnetic interference is reduced, but signal timing synchronization becomes difficult
Solution Approach 1:
The patent implements feedback mechanisms where the timing controller monitors the actual data transmission and adjusts the enable control signal timing accordingly. This feedback ensures that even though the data rate varies for EMI reduction, the enable control signal remains properly synchronized with the data signal transitions, maintaining signal integrity and display quality
Solution Approach 2:
The timing controller performs preliminary calculations to determine the appropriate enable control signal timing based on the anticipated data rate variations. By pre-calculating and compensating for the timing adjustments needed when data rate changes, the system maintains synchronization without requiring complex real-time adjustments
3Reliability
If enable control signal period is adjusted to match data rate, then signal synchronization is improved, but device complexity increases
Solution Approach 1:
The timing controller is designed to perform multiple functions: it generates the enable control signal, adjusts its timing based on data rate variations, and coordinates with the data driver. By making the timing controller multi-functional, the patent avoids adding separate dedicated circuits for each function, thereby reducing overall device complexity while maintaining signal synchronization
Solution Approach 2:
The timing controller autonomously adjusts the enable control signal timing based on feedback about data rate variations. The system self-regulates without requiring external intervention or complex coordination between multiple independent components, simplifying the overall device architecture while ensuring reliable synchronization
Data Source
AI summary
A display panel of a display device includes pixels connected to data lines, a timing controller generating image data, a data driver generating data signals based on the image data and outputting the data signals through an output terminal of the data driver, and a data distributor selectively connecting the output terminal of the data driver to the data lines of the display panel based on an enable control signal. The timing controller may periodically vary a data rate based on which the image data is transmitted to the data driver and may periodically vary an output time point of the enable control signal based on the data rate.


