Display Timing Offset Control for Latency Reduction
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Solution Overview
Problem
Existing electronic devices experience latency and reduced responsiveness due to delayed image processing and display times, which hinder smooth screen switching and user input responsiveness.
Innovation Solution
An electronic device comprising a display panel, display controller, memory, and processor that uses periodic synchronization signals to draw and compose images, measures standby times, and adjusts offset values to optimize image composition and drawing timing, thereby minimizing latency and improving responsiveness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If image processing is performed using conventional methods, then the display can show images, but latency time increases and responsiveness to user input deteriorates
Solution Approach 1:
The patent applies preliminary action by measuring the standby time in advance during the first image processing cycle, then using this pre-measured value to determine an offset value that is applied to synchronization signals in subsequent cycles. This allows the system to proactively adjust timing parameters before latency issues manifest, thereby reducing latency time and improving responsiveness to user input without sacrificing display functionality
2Productivity
If image processing timing is adjusted to reduce latency, then responsiveness improves, but display synchronization may become unstable
Solution Approach 1:
The patent implements feedback by measuring the actual standby time during the first image processing cycle and using this measured value to dynamically determine the offset value for subsequent synchronization signals. This closed-loop approach ensures that timing adjustments are based on real system performance data, allowing the system to improve responsiveness while maintaining display synchronization stability through data-driven timing optimization
3Device complexity
If the system waits for the next synchronization signal to display images, then display timing is simplified, but unnecessary standby time is incurred
Solution Approach 1:
The patent applies parameter changes by introducing an offset value that is derived from the measured standby time and applying it to the synchronization signal timing parameters. This modifies the timing parameters of subsequent synchronization signals to compensate for the previously measured standby period, thereby reducing or eliminating unnecessary waiting time while keeping the overall display timing control mechanism relatively simple
Data Source
AI summary
An electronic device according to one embodiment of the present invention can comprise a display panel, a display controller, a memory, and a processor electrically connected to the display panel, the display controller, and the memory. The memory can store instructions, when executed, which allow the process to: draw an image in response to a periodic synchronization signal; compose the drawl image in response to the synchronization signal after the drawing of the image; transmit the composed image to the display controller in response to synchronization signal after the composing of the image; measure, after the transmitting of the composed image, a first standby time until the next synchronization signal is generated; perform control such that the display panel displays an image in response to the generation of the next synchronization signal; determine a first offset value on the basis of the first standby time; and determine an image composition time point by applying the first offset value to the periodic synchronization Additionally, various examples are possible.