Display Device Transistor Bias and Light Blocking for Luminance Stability

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Solution Overview

Problem

Display devices experience luminance changes due to hysteresis curve shifts and leakage currents in transistors, particularly at low operating frequencies, leading to reduced display stability and increased power consumption.

Innovation Solution

A display device design incorporating a light emitting element with specific transistor configurations, including a bias transistor and light blocking patterns, to manage hysteresis curve shifts and leakage currents, with a driving frequency set between 20 Hz to 48 Hz to minimize luminance changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If pixels operate at low frequency to reduce power consumption, then power consumption is reduced, but luminance changes occur due to hysteresis curve shift and leakage current

Engineering Contradiction:
Improvepower consumptionVSAvoidluminance stability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent applies preliminary action by introducing a bias transistor that applies a bias voltage to the first transistor before the light emitting element emits light. This preliminary bias voltage application stabilizes the hysteresis curve of the transistor, preventing luminance changes that would otherwise occur during low-frequency operation. The bias transistor is switched by a bias scan signal and applies the bias voltage to the first electrode of the first transistor connected to the first power line, ensuring stable transistor characteristics before light emission.

Inventive Principle:
Principle #10Preliminary action

2Speed

If pixels operate at high frequency for quick screen transition, then screen transition speed is improved, but power consumption increases

Engineering Contradiction:
Improvescreen transition speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by enabling the display device to operate at variable frequencies between 20 Hz to 48 Hz depending on the display content requirements. The system dynamically adjusts the operating frequency: using higher frequencies (e.g., 48 Hz) when quick screen transition is needed for games or video, and lower frequencies (e.g., 20 Hz) when displaying static content like documents or still images. This dynamic frequency adjustment allows the system to optimize between screen transition speed and power consumption based on actual usage scenarios.

Inventive Principle:
Principle #15Dynamics

3Reliability

If light blocking patterns are added to block light toward transistors, then luminance change is reduced, but device complexity increases

Engineering Contradiction:
Improveluminance stabilityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by implementing light blocking patterns only in specific locations where they are most needed - adjacent to the third transistor (compensation transistor) and fourth transistor (initialization transistor). These patterns selectively block light that would otherwise reach these sensitive transistors and cause leakage current, without adding light blocking structures across the entire display area. This localized approach reduces luminance changes while minimizing the increase in device complexity.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12039926B2Display device and electronic device including the same
Publication Date: 2024.07.16 SAMSUNG DISPLAY CO LTD
  • US12039926B2 patent drawing
  • US12039926B2 patent drawing
  • US12039926B2 patent drawing

AI summary

A display device includes a light emitting element including an anode, a cathode, and a light emitting layer between the anode and the cathode, a first transistor connected between the anode and a first power line, the first transistor may be switched by a voltage of a node, a second transistor connected between the first transistor and a data line, the second transistor may be switched by a write scan signal, a third transistor connected between the node and the anode, the third transistor may be switched by a compensation scan signal, a fourth transistor connected between the node and an initialization line, the fourth transistor may be switched by an initialization scan signal, an insulating layer on the first to the fourth transistors, and a light blocking pattern protruding from the insulating layer, the light blocking pattern being adjacent to the third transistor and the fourth transistor.