Display Transistor Circuit Dynamics for Frame-Rate Flicker Control
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Solution Overview
Problem
Display devices experience issues such as tearing and stuttering due to mismatched frame rates between the GPU rendering speed and panel-driving frame, leading to flicker and hysteresis effects, which are not effectively addressed by existing synchronization techniques.
Innovation Solution
A display device design incorporating specific transistor configurations, including n-type transistors, to minimize leakage current and reduce power consumption while improving image quality by stabilizing transistor characteristics and compensating for varying frame rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the frame rate of the panel-driving frame is decreased to synchronize with GPU rendering speed, then image tearing and stuttering are reduced, but the driving time of the panel-driving frame increases causing flicker and hysteresis effects
Solution Approach 1:
The patent applies dynamics by making the transistor characteristics adjustable rather than fixed. The driving transistor's characteristics are dynamically changed during the panel-driving frame through controlled voltage application, allowing the system to adapt to varying frame rates while maintaining stable operation and avoiding flicker effects.
Solution Approach 2:
The patent changes the electrical parameters of the driving transistor during operation. By applying specific voltages to adjust the transistor's characteristics mid-frame, the system maintains optimal performance across different frame rates, resolving the contradiction between synchronization and flicker prevention.
2Reliability
If the driving time of the panel-driving frame increases to match lower frame rates, then frame rate synchronization is improved, but power consumption increases due to fixed transistor characteristics
Solution Approach 1:
The patent dynamically changes the electrical parameters of the driving transistor during the panel-driving frame. By adjusting transistor characteristics through voltage control, the system maintains energy efficiency even when operating at extended driving times required for lower frame rates, preventing excessive power consumption.
Solution Approach 2:
The system transitions from static transistor characteristics to dynamic, adjustable characteristics. This allows the transistor to adapt its state during the frame cycle, maintaining optimal power efficiency regardless of the extended driving time required for frame rate synchronization.
3Device complexity
If transistors are kept in a fixed predetermined state during the panel-driving frame, then circuit simplicity is maintained, but image quality deteriorates due to hysteresis characteristics
Solution Approach 1:
The patent introduces dynamic control of transistor characteristics without significantly increasing circuit complexity. By using existing control mechanisms to adjust transistor states during operation, the system improves image quality while maintaining relatively simple circuit architecture.
Solution Approach 2:
The patent changes transistor parameters during operation rather than requiring complex circuit designs. This approach improves image quality by avoiding hysteresis effects while keeping the added complexity minimal, as it primarily involves voltage control mechanisms.
Data Source
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AI summary
The present disclosure relates to a display device capable of improving image quality while reducing power consumption. According to one or more embodiments of the disclosure, a display device includes a light-emitting element connected between a driving voltage line and a common voltage line, a first transistor connected between the driving voltage line and the light-emitting element, a second transistor connected between a data line and a source electrode of the first transistor, a third transistor connected between a gate electrode of the first transistor and a drain electrode of the first transistor, and a fourth transistor connected between a drain electrode of the first transistor and a first initialization voltage line, wherein the third transistor and the fourth transistor include a same type.