Display Transistor Electrode Layout for Simpler Fabrication
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Solution Overview
Problem
Current display device fabrication processes are complex and do not ensure reliable device performance due to issues with semiconductor pattern formation and electrode integration.
Innovation Solution
A simplified fabrication process for a display device involving a semiconductor pattern on a substrate with insulating layers and electrodes, where the gate, source, and drain electrodes are on the same layer, and a conductive tail is exposed from the source electrode, enhancing device reliability and efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional fabrication processes are used for display devices, then device performance may be maintained, but the fabrication process becomes complex and device reliability is compromised
Solution Approach 1:
The fabrication process is segmented into distinct stages: forming the semiconductor pattern with source and drain regions, depositing the insulating layer, creating opening areas, and forming electrodes on the same layer. This segmentation allows each step to be optimized independently, simplifying the overall process while ensuring reliable device performance through controlled formation of each component.
Solution Approach 2:
The gate electrode, source electrode, and drain electrode are merged onto the same layer, eliminating the need for separate layer formations and reducing fabrication complexity. The conductive tail exposed from the source electrode is integrated directly into the electrode structure, creating a unified design that simplifies manufacturing while maintaining electrical performance.
2Manufacturing precision
If complex fabrication processes are used, then more precise control may be achieved, but the process becomes less efficient and more difficult to manufacture
Solution Approach 1:
The semiconductor pattern is formed in advance with defined source and drain regions before the insulating layer is deposited. The opening areas are predetermined in the insulating layer to align with the semiconductor pattern features. This preliminary action ensures precise pattern formation is achieved once, and subsequent steps simply follow the established geometry, improving ease of manufacture without sacrificing precision.
Solution Approach 2:
The same layer is used to form multiple electrodes (gate, source, and drain), making the layer structure universal for multiple functions. This multi-functionality reduces the number of fabrication steps required while maintaining the precision needed for each electrode's formation, as the same deposition and patterning processes apply to all electrodes.
3Productivity
If traditional electrode integration methods are used, then device structure may be maintained, but integration efficiency is reduced and fabrication is more complex
Solution Approach 1:
Multiple electrodes are combined on the same layer, allowing simultaneous formation and integration in a single fabrication sequence. The conductive tail from the source electrode is merged with the electrode structure, creating an integrated design that improves productivity by reducing the number of separate integration steps while maintaining clear structural definition for each electrode.
Data Source
AI summary
Provided herein may be a display device and a transistor. The display device may comprise a semiconductor pattern on a substrate and defining a hole, an insulating layer on the semiconductor pattern, and defining an opening area overlapping the hole, a gate electrode, a source electrode contacting a conductive area of the semiconductor pattern through the opening area, and a drain electrode on the insulating layer, electrodes respectively on the gate electrode, the source electrode, and the drain electrode, and spaced apart from each other, and light emitting elements between the electrodes, respectively.