Display Transistor Insulating Layer for Fewer Masks and Light Shielding
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Solution Overview
Problem
The existing display panel manufacturing process using masks is costly and complex, necessitating a simplification to reduce mask usage while maintaining reliability and display quality.
Innovation Solution
A display device with a simplified manufacturing process, featuring a base substrate with a transistor including a semiconductor pattern and gate electrode, a gate insulating pattern layer, connection electrodes, and an insulating layer with a low transmittance layer and high transmittance layers to enhance reliability and display quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a mask-based manufacturing process is used, then manufacturing precision can be maintained, but the device complexity and manufacturing cost increase
Solution Approach 1:
The patent combines multiple manufacturing steps into a single integrated process. Specifically, the buffer layer, gate insulating layer, and interlayer insulating layer are formed in one continuous process sequence without requiring separate mask alignment steps for each layer, thereby simplifying the manufacturing process while maintaining display quality
Solution Approach 2:
The insulating layer serves multiple functions simultaneously: it acts as a buffer layer for mechanical support, as a gate insulating layer for electrical isolation, and as an interlayer insulating layer for structural separation. This multi-functionality eliminates the need for separate dedicated layers and masks for each function
2Reliability
If multiple insulating layers with different transmittance are used, then display quality and reliability improve, but the device complexity increases
Solution Approach 1:
The insulating layer is designed with spatially varying optical properties: a first region with lower light transmittance (30-65%) positioned over the transistor area to protect against light-induced degradation, and a second region with higher light transmittance (80-95%) positioned over the display area to ensure optimal light transmission. This local differentiation of properties enables simultaneous protection of reliability and display quality without requiring multiple separate layers
Solution Approach 2:
The patent varies the optical transmission parameter of the insulating layer across different spatial regions. By controlling the composition ratio or thickness of the insulating material in different areas, the layer achieves distinct transmittance characteristics (30-65% vs 80-95%) to meet different functional requirements, thereby simplifying the overall structure while improving performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution reduces the number of masks required, simplifies the manufacturing process, and improves the reliability and display quality of the display device by using a low transmittance layer with specific silicon and nitrogen atom proportions and a high transmittance layer with high light transmittance.
Implementation Method 1
an insulating layer on the connection electrodes and the transistor. According to some embodiments, the insulating layer includes a low transmittance layer having a light transmittance equal to or greater than about 30% and equal to or smaller than about 65%
Implementation Method 2
the first high transmittance layer has a light transmittance equal to or greater than about 80% and equal to or smaller than about 95%
Data Source
AI summary
A display device includes: a base substrate; a transistor on the base substrate and comprising a semiconductor pattern and a gate electrode; a gate insulating pattern layer on the semiconductor pattern; connection electrodes on the gate insulating pattern layer and connected to the semiconductor pattern via contact holes; and an insulating layer on the connection electrodes and the transistor, wherein the connection electrodes are on a same layer as the gate electrode, the insulating layer comprises a low transmittance layer having a light transmittance equal to or greater than 30% and equal to or smaller than 65%.