Display Device Transistor Segmentation for Miniaturization

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Solution Overview

Problem

Display devices in digital mode require a large number of transistors due to the use of CMOS transistors for switching elements, which hinders further improvement in definition and size reduction.

Innovation Solution

The use of single channel transistors, such as nMOS or pMOS transistors, for the display select circuit and memory control circuit, reducing the number of transistors required in each sub-pixel and allowing for miniaturization and improved definition.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If CMOS transistors are used for all switching elements in digital mode display devices, then reliable switching and signal control are achieved, but the number of transistors increases extremely, making it difficult to improve definition and reduce size

Engineering Contradiction:
Improveswitching element reliabilityVSAvoidnumber of transistors
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the transistor types used in different circuit blocks. Specifically, CMOS transistors are used only in the memory device for reliable data storage, while single-channel transistors (nMOS or pMOS) are used in the display select circuit and memory control circuit. This segmentation reduces the total transistor count while maintaining reliability in critical areas.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different transistor characteristics to different functional areas. CMOS transistors with superior noise immunity and reliability are deployed where data integrity is paramount (memory device), while simpler single-channel transistors are used where absolute reliability is less critical but area consumption matters (display select circuit and control circuits).

Inventive Principle:
Principle #3Local quality

2Device complexity

If the number of transistors in each sub-pixel is reduced for miniaturization, then definition and size are improved, but circuit functionality and signal control may be compromised

Engineering Contradiction:
Improvenumber of transistors per sub-pixelVSAvoidcircuit functionality
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent divides the pixel circuit into functional segments with different transistor requirements. The display select circuit uses single-channel transistors for area reduction, while the memory device retains CMOS transistors for reliable signal control and data storage, ensuring overall circuit functionality is maintained despite the reduction in total transistor count.

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If more power sources are provided to support additional switching elements, then circuit functionality is enhanced, but power consumption increases

Engineering Contradiction:
Improvecircuit functionalityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts and eliminates unnecessary power sources by using single-channel transistors in places where dual-channel CMOS transistors would traditionally be required. This reduces the number of power supply lines needed while maintaining sufficient circuit functionality for display operation.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS10109249B2Display device
Publication Date: 2018.10.23 MAGNOLIA WHITE CORP
  • US10109249B2 patent drawing
  • US10109249B2 patent drawing
  • US10109249B2 patent drawing

AI summary

According to one embodiment, a display device includes substrates with pixels, a pixel electrode in each of the pixels, a display select circuit connected to the electrode, which supplies display and non-display voltages, a power line to which first and second voltages are supplied, a memory device connected to the power line and the display select circuit, a voltage select circuit which selects a voltage to be supplied to the power line from the first and second voltages, and a clock circuit which generates a clock signal. The memory device controls the display select circuit using the first and second voltages, and the first voltage select circuit selects the first or second voltages in synchronism with the clock signal.