Display Panel Via Layout for Low-Frequency Flicker Suppression
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Solution Overview
Problem
Low-frequency display panels experience flickering due to off-state leakage current affecting the gate potential of driving transistors, leading to unstable conduction and poor display effects, as existing methods struggle to adjust threshold voltages of driving transistors without impacting other switching transistors.
Innovation Solution
The display panel design includes a substrate with an array layer featuring pixel circuits and vias, where the distance between vias and channels of driving transistors is greater than a preset distance, while the distance between vias and channels of switching transistors is less than the preset distance, allowing for positive regulation of driving transistor threshold voltages without negatively affecting switching transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the distance between vias and driving transistor channel is increased, then the stability of gate potential of driving transistor is improved, but the area occupied by pixel circuit increases
Solution Approach 1:
The patent applies different distance requirements to different transistors: the driving transistor channel is positioned at a first distance (greater than preset distance) from the via to ensure stability, while switching transistor channels are positioned at a second distance (less than preset distance) to maintain compact layout. This local differentiation resolves the contradiction between reliability and area.
2Reliability
If the threshold voltage of driving transistor is regulated positively, then the off-state leakage current is reduced, but the area of transistor increases
Solution Approach 1:
The patent regulates the threshold voltage of the driving transistor by controlling the distance parameter between the via and transistor channel. By setting the driving transistor channel at a greater distance (first distance) from the via, the threshold voltage is positively regulated, reducing off-state leakage current without requiring additional area for separate compensation structures.
3Power
If switching transistor threshold voltage is regulated negatively, then the on-state current is improved, but the gate potential stability of driving transistor deteriorates
Solution Approach 1:
The patent applies selective distance positioning: switching transistor channels are positioned at a second distance (less than preset distance) from the via to achieve negative threshold voltage regulation and improved on-state current, while driving transistor channels are positioned at a first distance (greater than preset distance) to maintain gate potential stability. This local differentiation allows both requirements to coexist.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design ensures stable operation of driving transistors while negatively regulating switching transistors, improving display reliability and reducing flickering under low-frequency driving conditions.
Implementation Method 1
the distance between vias and the channels of driving and switching transistors is strategically set to minimize the impact of hydrogen discharging on threshold voltages
Data Source
AI summary
A display panel and a display apparatus are provided. The display panel includes a substrate and an array layer at a side of the substrate. The array layer includes pixel circuits and at least one first via. The pixel circuit includes transistors. Each transistor includes an active layer. The active layer includes a channel. The transistor includes a driving transistor and a first switching transistor. In a direction perpendicular to the substrate, a distance between one of the at least one first via and the channel of the driving transistor closest to the first via is greater than a preset distance. A distance between an edge of the one of the at least one first via and an edge of the channel of the first switching transistor closest to the one of the at least one first via is smaller than the preset distance.