Display Voltage Error Compensation via Emission Profile Awareness
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Solution Overview
Problem
Electronic displays with self-emissive pixels face issues with voltage errors, specifically IR drops, which cause front-of-screen (FoS) artifacts due to AC or DC mechanisms, affecting picture quality.
Innovation Solution
The implementation of emission profile awareness circuitry and accumulator compensation to accurately determine voltage errors across the electronic display. This involves accounting for the rolling emission mask in APL calculations for DC mechanisms and using weighted voltage error differentials to mirror AC components, allowing for targeted compensation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If content-adaptive two-dimensional IR drop adjustment is employed to account for non-linear voltage error, then voltage error compensation accuracy is improved, but device complexity increases
Solution Approach 1:
The patent divides the display panel into multiple zones (e.g., row zones and column zones) and calculates separate voltage error differentials for each zone. This segmentation allows the system to handle complex non-linear voltage errors through manageable local calculations rather than requiring a single complex global compensation model.
Solution Approach 2:
The patent performs preliminary calculations of zone-based voltage error differentials before applying the final compensation. By pre-calculating the voltage error characteristics for each zone and storing them in lookup tables, the system prepares compensation data in advance, reducing the complexity of real-time compensation operations.
2Measurement precision
If emission profile awareness circuitry is implemented to account for rolling emission mask in APL calculations, then DC voltage error determination accuracy is improved, but device complexity increases
Solution Approach 1:
The patent introduces emission profile awareness circuitry as an intermediary component that specifically handles the rolling emission mask information. This dedicated circuitry processes the emission mask data and integrates it with APL calculations, isolating the complexity of DC voltage error compensation from the rest of the display driver system.
3Measurement precision
If accumulator compensation is implemented to determine multiple voltage error differentials between rows, then AC voltage error compensation accuracy is improved, but device complexity increases
Solution Approach 1:
The patent extends the compensation approach from simple spatial zoning to include temporal accumulation across multiple frames. The accumulator compensation mechanism maintains historical voltage error data across time dimensions, allowing the system to capture AC voltage error patterns that vary over time while building on the existing spatial zone-based compensation framework.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively mitigates FoS artifacts caused by voltage fluctuations, improving the overall picture quality of electronic displays by accurately compensating for both DC and AC components of voltage errors.
Implementation Method 1
the voltage supplied may drop as the voltage is delivered to pixels further away from the power supply due to internal resistance of the conductive wires and/or the LEDs themselves. For this reason, the voltage error or voltage drop is also often referred to as IR error or IR drop, corresponding to the principle that voltage (V) is equal to current (I) multiplied by resistance (R) in a circuit.
Data Source
AI summary
Embodiments herein provide various apparatuses and techniques to efficiently mitigate front-of-screen (FoS) artifacts that may occur due to voltage fluctuations due to alternating current (AC) or direct current (DC) mechanisms that may occur in a variety of pixel types. In one embodiment, emission profile awareness circuitry may be implemented to mitigate for FoS artifacts due to DC mechanisms. Two-dimensional (2D) digital compensation circuitry may address the DC portion of the voltage fluctuations by accounting for an emission profile applied to content displayed on an electronic display. In some embodiments, the 2D digital compensation circuitry may compensate for the AC portion of the voltage fluctuations by duplicating the AC voltage fluctuations via voltage error subtraction circuitry and voltage error accumulation circuitry.