Display Unit Wiring Layer Vertical Positioning

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current display units face limitations in designing wiring lines in the peripheral region due to constraints in material and thickness selection, which can lead to short circuits and moisture ingress, affecting reliability and performance.

Innovation Solution

A display unit design where the first wiring layer is positioned closer to the substrate than the gate electrode and source-drain electrodes, allowing for independent selection of material and thickness, and an insulating film is used between the second wiring layer and the first wiring layer to prevent short circuits and moisture ingress.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If wiring lines are disposed in the same layer as gate electrode and source-drain electrode, then wiring layout is simplified, but material and thickness selection is constrained leading to short circuits and moisture ingress

Engineering Contradiction:
Improvewiring layout complexityVSAvoidshort circuit prevention and moisture resistance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent positions the first wiring layer at a different vertical level (closer to the substrate) than the gate electrode and source-drain electrode layers. This spatial separation in the vertical dimension allows independent material and thickness selection for each layer, preventing short circuits and moisture ingress while maintaining wiring connectivity through appropriate vias and contacts.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If wiring lines are positioned closer to the substrate, then freedom in material and thickness selection is enhanced, but wiring connectivity to upper layers becomes more complex

Engineering Contradiction:
Improvematerial and thickness selection freedomVSAvoidwiring connectivity structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent divides the wiring structure into multiple independent layers: the first wiring layer positioned closer to the substrate with optimized material and thickness, and the gate electrode/source-drain electrode layers positioned at upper levels. This segmentation allows each layer to be independently optimized for its specific function while connectivity is established through controlled vias and contact structures.

Inventive Principle:
Principle #1Segmentation

3Reliability

If insulating film is added between wiring layers, then short circuit and moisture ingress are prevented, but device structure becomes more complex

Engineering Contradiction:
Improveelectrical insulation and moisture barrierVSAvoidinsulating film structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces an insulating film as an intermediary layer positioned between the first wiring layer and the second wiring layer. This insulating film serves as a mediator that provides both electrical insulation to prevent short circuits and moisture barrier functionality, while the overall structure remains integrated and manufacturable through standard semiconductor processing techniques.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11063109B2Display unit
Publication Date: 2021.07.13 MAGNOLIA BLUE CORP
  • US11063109B2 patent drawing
  • US11063109B2 patent drawing
  • US11063109B2 patent drawing

AI summary

A display unit includes a first substrate, a transistor, first and second wiring layers, and an insulating film. The first substrate is provided with a display region and a peripheral region. The transistor is provided in the display region, and includes a semiconductor layer, a gate electrode facing the semiconductor layer, a gate insulating film between the gate electrode and the semiconductor layer, and a source-drain electrode electrically coupled to the semiconductor layer. The first wiring layer is provided in the peripheral region, electrically coupled to the transistor, and disposed closer to the first substrate than the same layer as the gate electrode and the source-drain electrode. The second wiring layer is provided on the first substrate and has an electric potential different from the first wiring layer. The insulating film is provided between the second wiring layer and the first wiring layer.