Display Wiring Layout Using Layered Scan Lines for Narrow Bezels
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing display devices face challenges in efficiently arranging and connecting the various signal lines and drivers within the pixel and peripheral areas, leading to potential interference and increased bezel width, which affects the overall display performance and aesthetics.
Innovation Solution
The display device incorporates a substrate with specific arrangements of data, scan, and power supply lines, along with insulating layers and bridges, to optimize the layout and reduce interference, while using scan and emission drivers positioned in the peripheral area to minimize bezel width.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If wiring lines are arranged in various manners to supply signals to each pixel, then signal supply capability is improved, but device complexity increases
Solution Approach 1:
The display device divides the substrate into pixel area and peripheral area, with different wiring arrangements in each region. Scan lines are disposed below the third insulating layer in the pixel area but on the third insulating layer in the peripheral area, creating segmented wiring zones that simplify the overall design while maintaining signal supply capability.
Solution Approach 2:
The patent utilizes the third insulating layer as an additional dimensional space for routing scan lines in the peripheral area. By moving scan lines to a higher layer (on top of the third insulating layer) in the peripheral region, the design gains vertical space for wiring without increasing horizontal complexity.
2Object-affected harmful factors
If multiple insulating layers and bridges are used to arrange wiring lines, then signal interference is reduced, but manufacturing complexity increases
Solution Approach 1:
Different insulating layer configurations are applied to different regions: in the pixel area, scan lines are below the third insulating layer, while in the peripheral area, they are on the third insulating layer. This localized differentiation reduces signal interference where needed while simplifying manufacturing in other regions.
Solution Approach 2:
The third insulating layer serves as an intermediary structure that enables separate routing of scan lines in the peripheral area. By providing this intermediate layer, the patent facilitates wiring organization and reduces signal interference without requiring complex multi-layer interconnections throughout the entire device.
3Length of stationary object
If scan lines are disposed on the third insulating layer in the peripheral area, then bezel width is minimized, but wiring connection complexity increases
Solution Approach 1:
The scan line routing is segmented into two distinct configurations: below the third insulating layer in the pixel area and on the third insulating layer in the peripheral area. This segmentation allows the peripheral scan lines to be positioned closer to the edge, minimizing bezel width, while the pixel area maintains its original wiring structure.
Solution Approach 2:
Instead of maintaining a uniform wiring arrangement throughout the substrate, the patent inverts the expected configuration by placing scan lines on the third insulating layer specifically in the peripheral area where minimal bezel width is critical, rather than keeping them below the insulating layer as in conventional designs.
Data Source
AI summary
A display device includes a substrate having a pixel area and a peripheral area, a plurality of pixels disposed on the substrate in the pixel area, a plurality of data lines that supply a plurality of data signals to the pixels, a plurality of scan lines that supply a plurality of scan signals to the pixels, a plurality of power supply lines that supply a first voltage to the pixels, and first through third insulating layers. The first insulating layer is disposed on the substrate, the second insulating layer is disposed on the first insulating layer, and the third insulating layer is disposed on the second insulating layer. The scan lines are disposed below the third insulating layer on the substrate in the pixel area, and are disposed on the third insulating layer in the peripheral area.