Display Wiring Layout Using Multi-Layer Peripheral Scan Lines
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Solution Overview
Problem
Existing display devices face challenges in efficiently arranging and connecting wiring lines in the peripheral area, leading to potential short circuits due to close proximity and varying heights of insulating layers, which affects the reliability and efficiency of signal transmission.
Innovation Solution
The display device employs a specific arrangement of insulating layers and wiring lines, where scan lines, emission control lines, and power supply lines are disposed on different layers, with bridges connecting them, ensuring increased distance and preventing short circuits by forming these lines on the third insulating layer in the peripheral area, using the same processes and materials as in the pixel area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If wiring lines are arranged in the peripheral area with close proximity to save space, then area utilization is improved, but the risk of short circuits increases due to varying heights of insulating layers
Solution Approach 1:
The patent applies dimensionality change by transitioning wiring line arrangements from a two-dimensional plane to a three-dimensional multi-layer structure. Specifically, different types of wiring lines (scan lines, emission control lines, power supply lines) are disposed on different insulating layers (first, second, and third insulating layers) with varying thicknesses. This vertical stacking in the third dimension allows wiring lines to be closely spaced horizontally while maintaining sufficient vertical separation to prevent short circuits, thus resolving the contradiction between area utilization and short circuit risk.
2Ease of manufacture
If multiple types of wiring lines are disposed on the same insulating layer, then manufacturing process is simplified, but the distance between lines decreases leading to potential short circuits
Solution Approach 1:
The patent applies segmentation by dividing the wiring line arrangement into distinct segments based on insulating layers. Different types of wiring lines are segregated onto different insulating layers: scan lines on the first insulating layer, emission control lines on the second insulating layer, and power supply lines on the third insulating layer. This segmentation increases the vertical distance between different wiring line types, preventing short circuits while still allowing for efficient manufacturing through systematic layer-by-layer processing.
Solution Approach 2:
The patent resolves the manufacturing complexity issue by applying dimensionality change, where the segmentation of wiring lines onto different insulating layers is achieved through a systematic multi-layer fabrication process. Although more layers are used, each layer can be processed using standard thin-film deposition and patterning techniques, making the overall process manageable and scalable.
3Length of stationary object
If insulating layers are made thinner to reduce device thickness, then overall device thickness is reduced, but the separation between wiring lines decreases increasing short circuit risk
Solution Approach 1:
The patent addresses this contradiction by utilizing the third dimension (vertical stacking) more effectively. Instead of relying solely on horizontal separation, the design stacks insulating layers vertically with wiring lines positioned at different heights. This allows the overall device thickness to remain compact while maintaining adequate vertical separation between wiring lines on adjacent layers, preventing short circuits even when individual layer thicknesses are reduced.
Data Source
AI summary
A display device includes a substrate having a pixel area and a peripheral area, a plurality of pixels disposed on the substrate in the pixel area, a plurality of data lines that supply a plurality of data signals to the pixels, a plurality of scan lines that supply a plurality of scan signals to the pixels, a plurality of power supply lines that supply a first voltage to the pixels, and first through third insulating layers. The first insulating layer is disposed on the substrate, the second insulating layer is disposed on the first insulating layer, and the third insulating layer is disposed on the second insulating layer. The scan lines are disposed below the third insulating layer on the substrate in the pixel area, and are disposed on the third insulating layer in the peripheral area.