Multilayer Display Wiring Layout to Reduce Signal Coupling
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Solution Overview
Problem
As display devices with increased display areas and reduced non-display areas lead to closer wiring distances, coupling between wirings occurs, degrading image quality due to increased parasitic capacitance and signal interference.
Innovation Solution
The implementation of a display device with first and second transistors on a substrate, where the first transistor includes a polycrystalline silicon semiconductor layer and the second transistor includes an oxide semiconductor layer, both having gate electrodes at different levels, and a plurality of wirings arranged at different levels in the peripheral area, with first and second wirings alternately positioned and partially overlapping to increase spacing and reduce coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of wirings is increased to provide higher resolution, then the display resolution is improved, but the distance between wirings becomes smaller causing coupling and degrading image quality
Solution Approach 1:
The patent applies multi-layer wiring configuration where wirings are arranged at different vertical levels (first wirings on first insulating layer, second wirings on second insulating layer). This dimensional separation increases the effective distance between adjacent wirings, reducing parasitic capacitance and coupling effects while enabling higher wiring density on the display device.
Solution Approach 2:
The patent introduces insulating layers (first insulating layer and second insulating layer) as intermediary structures between wirings. These insulating layers act as dielectric mediators that reduce the coupling between adjacent wirings by increasing the electrical distance and providing insulation, thereby minimizing signal interference while maintaining compact wiring spacing.
2Area of stationary object
If the non-display area is decreased to increase display area, then the display area is improved, but the wiring distance becomes smaller causing signal interference
Solution Approach 1:
By transitioning from planar wiring arrangement to three-dimensional multi-layer wiring structure, the patent achieves increased wiring separation without increasing the footprint area. The vertical stacking of wirings on different insulating layers allows compact layout while maintaining sufficient electrical distance, thus preventing signal interference in reduced non-display area configurations.
3Length of stationary object
If wirings are arranged closer together to reduce device size, then the device thickness is reduced, but coupling between wirings increases degrading image quality
Solution Approach 1:
The patent utilizes vertical layering with multiple insulating layers to separate wirings in the thickness direction rather than only in the lateral direction. This allows wirings to be positioned closer laterally for reduced device footprint while maintaining adequate vertical separation through insulating layers, thus minimizing coupling effects despite reduced overall device dimensions.
Data Source
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AI summary
Provided is a display device including: a substrate having a display area and a peripheral area outside the display area; a first transistor and a second transistor each located over the display area of the substrate and arranged at different levels on the substrate; and a plurality of wirings located over the peripheral area of the substrate, wherein the plurality of wirings include first wirings and second wirings, the first wirings and the second wirings being located at different levels on the substrate and are alternately arranged with each other.