DisplayPort Symbol Stream FEC for Burst Error Correction

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Solution Overview

Problem

High-speed serial interconnects, such as DisplayPort, face challenges in error correction, particularly for compressed symbol streams, where random bit errors can corrupt entire frames, leading to unacceptable data loss.

Innovation Solution

The implementation of forward error correction (FEC) techniques using Reed-Solomon encoding and symbol interleaving to add redundancy to the symbol stream, enabling detection and correction of bit errors, specifically for fully formed symbol streams in modern high-speed serial interconnects like DisplayPort.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If forward error correction (FEC) techniques are implemented for compressed symbol streams, then data integrity and frame corruption prevention are improved, but device complexity and processing overhead increase

Engineering Contradiction:

Improvedata integrityVSAvoidprocessing complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies Reed-Solomon encoding to add redundancy symbols to the compressed symbol stream before transmission. This preliminary action enables the receiver to detect and correct bit errors without requiring retransmission, thereby improving data integrity while managing processing complexity through standardized encoding algorithms.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent introduces FEC parity symbols as an intermediary element between the compressed symbol stream and the transmission medium. These parity symbols act as a mediator that carries error correction information, allowing the receiver to reconstruct corrupted data without directly processing the entire compressed stream, thus balancing reliability improvement with acceptable processing complexity.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If FEC parity bits are added to the symbol stream, then error detection and correction capability are improved, but bandwidth utilization and transmission efficiency decrease

Engineering Contradiction:

Improveerror correction capabilityVSAvoidtransmission efficiency

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent employs Reed-Solomon (n, k) encoding where the code rate k/n can be adjusted to balance error correction capability with transmission efficiency. By changing the parameters of the FEC code, the system can adapt to different channel conditions and quality requirements, optimizing the trade-off between reliability and productivity for compressed symbol streams.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS11522640B2High speed interconnect symbol stream forward error-correction

Publication Date: 2022.12.06 INTEL CORP

AI summary

Disclosed herein are techniques to provide forward error correction for a high-speed interconnect symbol stream, such as, DisplayPort. The symbol stream may be split into FEC blocks and parity bits generated for each of the FEC blocks. The parity bits may be interleaved, encoded, and transmitted over an interconnect along with the symbol stream to provide forward error correction for the symbol stream.