DisplayPort Receiver Circuit for Automatic DC Offset Cancellation

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Solution Overview

Problem

Existing digital display interfaces face challenges in accurately comparing differential signals due to varying pull-up and pull-down resistances, leading to common mode in-phase noise that compromises the quality of received audio, video, or control data.

Innovation Solution

The implementation of a high pass filter and a differential integrator in an electronic device, which processes a differential input signal with reference to a predefined reference voltage, effectively filters out low-frequency noise and controls common mode DC voltage levels to suppress in-phase noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If low-pass filters are used to filter differential signals separately, then DC voltage ripples are reduced, but common mode in-phase noise remains and is difficult to cancel

Engineering Contradiction:
ImproveDC voltage detection accuracyVSAvoidcommon mode in-phase noise
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The filtering function is segmented into two distinct stages: first, separate low-pass filters are applied to each differential signal to reduce DC ripples; second, a differential integrator processes the filtered signals to cancel common mode noise. This segmentation allows each filter to specialize in addressing specific noise components without compromising the other.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A differential integrator is introduced as an intermediary component between the low-pass filters and the comparator. This integrator acts as a mediator that processes the filtered differential signals and eliminates common mode in-phase noise before the signals reach the comparator, thereby improving measurement precision without being affected by the harmful noise.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If different pull-up and pull-down resistances are used in signal channels, then signal levels are adjusted, but common mode DC signals become different making accurate comparison impossible

Engineering Contradiction:
Improvesignal level adjustmentVSAvoiddifferential signal comparison accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The differential integrator employs feedback mechanisms to continuously monitor and adjust the common mode voltage levels of differential signals. By feeding back the integrated error signal, the system automatically compensates for differences in common mode DC signals caused by varying pull-up and pull-down resistances, enabling accurate comparison while maintaining operational flexibility.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system dynamically changes the common mode voltage parameter through the differential integrator's integration process. By integrating the difference between the two differential signals over time, the common mode voltage levels are adjusted to be substantially equal, thereby enabling accurate comparison despite different pull-up and pull-down resistance configurations.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If common mode DC voltage levels are not controlled, then in-phase noise is not suppressed, but signal processing accuracy is compromised

Engineering Contradiction:
Improvesignal processing reliabilityVSAvoidin-phase noise
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The differential integrator performs preliminary action by pre-processing the differential signals to equalize common mode DC voltage levels before the signals undergo further processing or comparison. This preliminary equalization action suppresses in-phase noise in advance, ensuring that subsequent signal processing operations are performed on noise-reduced signals, thereby improving reliability.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enables prompt, accurate, and reliable processing of data signals by suppressing common mode noise, thereby improving the fidelity and accuracy of data recovery in digital display interfaces.

Implementation Method 1

The high pass filter is coupled to the input interface and configured to filter the differential input signal and generate a filtered differential input signal

Methodology Applied
Scientific EffectFiltering: Filter (electronic)

Implementation Method 2

The differential integrator is coupled to the high pass filter and the reference interface and configured to receive the filtered differential input signal and generate a differential output signal

Methodology Applied
Scientific EffectIntegration:

Data Source

PatentUS12278636B2Receiver circuit with automatic DC offset cancellation in display port applications
Publication Date: 2025.04.15 PARADE TECHNOLOGIES LTD
  • US12278636B2 patent drawing
  • US12278636B2 patent drawing
  • US12278636B2 patent drawing

AI summary

This application is directed to a data interface having an input interface for receiving a differential input signal and a reference interface for providing a predefined reference voltage. A high pass filter is coupled to the input interface, and configured to filter the differential input signal and generate a filtered differential input signal. A differential integrator is coupled to the high pass filter and reference interface, and configured to receive the filtered differential input signal and generate a differential output signal including a first output signal and a second output signal. Each of the first and second output signals has a common mode output voltage substantially equal to the predefined reference voltage. In some embodiments, the data interface includes a connector including a plurality of data lanes and a pair of command pins that are distinct from the data lanes and coupled to the input interface.