Segregated Dissimilar FPGA Cores for Redundant Flight Control

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Solution Overview

Problem

Designing aircraft control systems with multiple redundant processing circuits that meet strict safety requirements for dissimilarity while minimizing component count and complexity is challenging, as existing approaches often require multiple FPGAs or shared peripheral components, which can be costly and weight-intensive.

Innovation Solution

A Field Programmable Gate Array (FPGA) architecture with segregated, dissimilar processing circuits, where each circuit has its own numerical core and peripheral components, and communicates externally, allowing for independent operation and reduced component redundancy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple FPGAs are used to implement redundant processing circuits, then system reliability is improved, but device complexity and component count increase

Engineering Contradiction:
Improvesystem reliabilityVSAvoidcomponent count
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Multiple processing circuits are merged into a single FPGA device, allowing redundant controllers to coexist on one chip while maintaining their functional independence through segregated floorplan regions

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The FPGA is segmented into distinct floorplan regions that physically separate different processing circuits, ensuring that each circuit has dedicated resources and cannot interfere with others, thereby maintaining reliability while reducing overall component count

Inventive Principle:
Principle #1Segmentation

2Device complexity

If processing circuits share peripheral components, then component count is reduced, but reliability and dissimilarity requirements are compromised

Engineering Contradiction:
Improvecomponent countVSAvoiddissimilarity requirement
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

Peripheral components are segmented and assigned to specific processing circuits through the floorplan segregation mechanism, ensuring that each circuit has dedicated access to its own peripherals without sharing, thus maintaining dissimilarity and reliability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The FPGA fabric itself serves as a universal resource that can be configured to provide different peripheral functions to different processing circuits, reducing the need for separate dedicated hardware peripherals for each circuit

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If dissimilar numerical cores are used in redundant circuits, then safety requirements are met, but design complexity increases

Engineering Contradiction:
Improvesafety requirementVSAvoiddesign process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The floorplan is segmented into separate regions that can accommodate different numerical core designs, allowing each region to be independently designed and verified while maintaining overall system integration on a single FPGA

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the FPGA floorplan are assigned different quality characteristics through the use of dissimilar numerical cores, with each region optimized for its specific processing requirements while maintaining physical separation

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11157673B2Field programmable gate array (FPGA) having dissimilar cores
Publication Date: 2021.10.26 RATIER FIGEAC SAS
  • US11157673B2 patent drawing
  • US11157673B2 patent drawing
  • US11157673B2 patent drawing

AI summary

A field programmable gate array (FPGA) having at least first and second processing circuits implemented thereon. Each of the first and second processing circuits comprises a numerical core and associated peripheral components. The numerical core in the first processing circuit is dissimilar to the numerical core in the second processing circuit. The first and second processing circuits are segregated from each other in floorplan view.