Distributed Amplifier Bias Circuit With Capacitor Multiplier for Low Power
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Solution Overview
Problem
Traditional distributed amplifiers face high power consumption due to higher supply voltage requirements, leading to increased chip temperature and reduced performance, especially when large currents pass through load resistors, complicating circuit design and heat dissipation.
Innovation Solution
The distributed amplifier redesigns the bias voltage circuit position and introduces a capacitor multiplier to decrease voltage drops and power consumption, maintaining performance without increasing supply voltage, by modifying the current flow direction and adding a capacitor amplifying unit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the supply voltage is increased to meet the requirements of the distributed amplifier, then the output amplitude and driving capability are improved, but the power consumption increases
Solution Approach 1:
The patent changes the circuit topology by moving the bias voltage circuit from the traditional position (side of load resistor) to a new position (between drain line circuit and output terminal), and introduces a capacitor multiplier to change the electrical parameters. This allows the amplifier to achieve required output amplitude with lower supply voltage, thus reducing power consumption while maintaining driving capability
2Use of energy by moving object
If the current consumption of the internal amplifier unit is decreased to reduce power consumption, then the power consumption is reduced, but the circuit design complexity increases
Solution Approach 1:
The patent introduces a capacitor multiplier as an intermediary component in the bias voltage circuit. This capacitor multiplier works together with the repositioned bias voltage circuit to provide the necessary voltage amplification and signal coupling, enabling the amplifier unit to operate with lower current consumption while maintaining performance, without requiring complex circuit modifications
3Use of energy by moving object
If inductors connected in parallel are used to decrease power consumption, then the power consumption is reduced, but the chip area increases
Solution Approach 1:
The patent extracts the need for parallel inductors by fundamentally changing the bias voltage circuit architecture. By repositioning the bias voltage circuit to between the drain line circuit and output terminal, and incorporating a capacitor multiplier, the design achieves power reduction without relying on additional inductive components, thereby avoiding the area penalty associated with parallel inductor configurations
4Power
If the voltage of the bias voltage circuit is increased to maintain drain line voltage, then the amplifier performance is maintained, but the power consumption greatly increases
Solution Approach 1:
The patent inverts the traditional approach by not increasing the bias voltage to maintain drain line voltage, but rather repositioning the bias voltage circuit and using a capacitor multiplier to achieve voltage amplification through capacitive coupling. This inverted approach maintains amplifier performance while operating at lower voltage levels, thereby reducing power consumption
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces power consumption and maintains amplifier performance, allowing for high-speed communication without increasing chip area or supply voltage, thus addressing the issues of high power consumption and temperature-related operational challenges.
Implementation Method 1
a capacitor multiplier connected to the inductor, the drain line circuit and the output terminal
Implementation Method 2
an inductor connected to the voltage source and a terminal of the drain line circuit
Implementation Method 3
an amplifier unit, a gate line circuit, a first load circuit, a second load circuit, a drain line circuit
Data Source
AI summary
A distributed amplifier with low supply voltage and low power consumption is provided. The distributed amplifier includes an input terminal inputting an input signal; an output terminal outputting an output signal; an amplifier unit; a gate line circuit connected to the input terminal, a first load circuit and the amplifier unit; a second load circuit; a drain line circuit connected to the second load circuit, the amplifier unit and the output terminal; and a bias voltage circuit connected between the drain line circuit and the output terminal, wherein the bias voltage circuit includes a voltage source; an inductor connected to the voltage source and a terminal of the drain line circuit; and a capacitor multiplier connected to the inductor, the drain line circuit and the output terminal.