Distributed Amplifier Load Impedance Pre-Distortion for Broadband Matching

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Solution Overview

Problem

Distributed amplifiers face performance degradation due to parasitic-loading effects caused by the on-chip/off-chip boundary, leading to impedance mismatch and frequency dispersion at summing points, which affects the output power and efficiency.

Innovation Solution

The introduction of an intelligent pre-distortion (IP) block in the output transmission line, comprising capacitive and inductive components, to offset the summing-point load impedance and maintain a consistent driving-point load impedance, thereby compensating for parasitic effects and ensuring optimal power transistor loading.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the output transmission line is placed off-chip to handle high power signals, then the dissipation problem is solved, but the parasitic-loading effects cause impedance mismatch and performance degradation

Engineering Contradiction:
ImprovedissipationVSAvoidimpedance matching
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent applies preliminary anti-action by introducing a pre-distortion network that anticipates and compensates for the parasitic loading effects before they degrade the impedance matching. The network pre-adjusts the impedance characteristics to counteract the expected parasitic effects, thereby maintaining optimal power transfer and minimizing reflections despite the off-chip transmission line configuration.

Inventive Principle:
Principle #9Preliminary anti-action

2Adaptability or versatility

If the summing-point load impedance is allowed to vary with frequency, then the broadband operation is achieved, but the impedance mismatch degrades the amplifier performance

Engineering Contradiction:
Improvebroadband operationVSAvoidamplifier performance
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent employs parameter changes by utilizing frequency-dependent impedance transformation through the pre-distortion network. The network contains reactive elements whose impedance characteristics vary with frequency, allowing the system to dynamically adjust the load impedance presented to each power transistor across the broadband frequency range, thereby maintaining optimal performance despite frequency variations.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively mitigates the impedance mismatch and frequency dispersion, enhancing the performance of distributed amplifiers by maintaining a broadband load impedance across frequencies, improving power amplification and reducing the impact of parasitic effects.

Implementation Method 1

The introduction of an intelligent pre-distortion (IP) block in the output transmission line, comprising capacitive and inductive components, to offset the summing-point load impedance

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

The introduction of an intelligent pre-distortion (IP) block in the output transmission line, comprising capacitive and inductive components, to offset the summing-point load impedance

Methodology Applied
Scientific EffectInductance: Inductor

Data Source

PatentUS7880558B2Method and apparatus for adjusting load impedance of a distributed amplifier
Publication Date: 2011.02.01 MOTOROLA SOLUTIONS INC
  • US7880558B2 patent drawing
  • US7880558B2 patent drawing
  • US7880558B2 patent drawing

AI summary

The application discloses a method and apparatus for adjusting internal load impedances, by section, at feed points present on a distributed amplifier's output transmission line. The method includes determining a summing-point load impedance (Zx) at an off-chip output transmission line of the distributed amplifier. The method further includes determining a driving-point load impedance (Zd) at an output of an on-chip power transistor. The driving-point load impedance diverges and disperses over frequency from that summing-point load impedance due to reactance of at least one on-chip component coupled to the output of the on-chip power transistor. The method then includes determining and providing an offset to summing-point load impedance (Zx) based on the driving-point load impedance (Zd) such that the driving-point load impedance (Zd) converges to the summing-point load impedance (Zx) of that distributed amplifier section.