Distributed Circuit Testing Algorithm Execution
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Solution Overview
Problem
Current automated circuit testing algorithms face challenges in achieving high fault coverage while minimizing test costs and chip area overhead, particularly due to the increasing complexity and data volume of integrated circuits, which leads to inefficiencies in test pattern generation and fault simulation.
Innovation Solution
The method involves distributing the execution of circuit testing algorithms across multiple processors, allowing independent portions to be executed in parallel and non-sequential manner, with a controlling processor managing the execution and results processing to ensure consistency and efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If automated test pattern generation algorithms are executed on a single processor, then the algorithms can be implemented with simpler hardware architecture, but the computational time and processing speed become excessively long for complex integrated circuits
Solution Approach 1:
The patent divides the test pattern generation algorithm into multiple independent portions that can be executed in parallel. Each processor handles specific algorithm portions independently, allowing simultaneous execution of fault selection, test pattern generation, and fault simulation tasks that were previously sequential, thereby increasing speed without requiring complex inter-processor communication infrastructure
Solution Approach 2:
The patent transitions from sequential single-processor execution to parallel multi-processor execution by adding the time dimension to the processing architecture. Independent algorithm portions are distributed across multiple processors operating simultaneously, effectively converting a time-consuming sequential process into a spatially distributed parallel process that achieves speedup without complex synchronization mechanisms
2Loss of time
If the test pattern generation algorithm is distributed across multiple processors, then the computational time is reduced, but the complexity of managing execution and results processing increases
Solution Approach 1:
The patent segments the algorithm into independent portions with well-defined interfaces and data exchange protocols. Each processor segment operates autonomously on its assigned tasks, reducing the complexity of inter-processor coordination by minimizing synchronization requirements and enabling independent execution of fault selection, pattern generation, and simulation tasks
Solution Approach 2:
The patent performs preliminary distribution of algorithm portions to processors before execution begins. The controlling processor allocates specific independent algorithm portions to worker processors in advance, establishing execution schedules and data flow paths beforehand, which simplifies runtime management and reduces the complexity of dynamic coordination during test pattern generation
3Productivity
If independent portions of the algorithm are executed in parallel, then productivity is improved, but ensuring consistent results with sequential execution becomes more difficult
Solution Approach 1:
The patent identifies and segments independent algorithm portions that have no data dependencies on each other, such as separate fault selection processes, independent test pattern generation tasks, and parallel fault simulation operations. By ensuring these segmented portions operate independently without shared state, the system achieves parallel productivity improvement while maintaining deterministic, consistent results that match sequential execution
Solution Approach 2:
The patent implements multiple independent instances of algorithm portions across different processors, where each processor maintains its own copy of the algorithm logic and data structures. This copying approach ensures that parallel execution produces identical results to sequential execution, as each processor independently computes the same algorithmic operations without interference from other processors, thereby guaranteeing results consistency
Data Source
AI summary
Described herein are methods and systems for distributed execution of circuit testing algorithms, or portions thereof. Distributed processing can result in faster processing. Algorithms or portions of algorithms that are independent from each other can be executed in a non-sequential manner (e.g., parallel) over a network of plurality of processors. The network includes a controlling processor that can allocate tasks to other processors and conduct the execution of some tasks on its own. Dependent algorithms, or portions thereof, can be performed on the controlling processor or one of the controlled processors in a sequential manner.