Distributed Clock Synchronization Protocol Fault Tolerance

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Solution Overview

Problem

Existing clock synchronization protocols in distributed computer networks lack sufficient fault-tolerance, particularly in scenarios with multiple inconsistent faults and transient disturbances, and do not efficiently handle failures in communication channels and end systems.

Innovation Solution

A scalable clock synchronization protocol that employs a fault-tolerant handshake process, clique detection mechanisms, and central guardian functionality to maintain synchronization even in the presence of faulty communication channels and end systems, allowing for self-stabilization and tolerance of multiple failures, including arbitrary transient disturbances and inconsistent omission failures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If existing clock synchronization protocols are used, then basic synchronization is achieved, but fault-tolerance against multiple inconsistent faults and transient disturbances is insufficient

Engineering Contradiction:
Improvefault-toleranceVSAvoidprotocol complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The protocol segments the synchronization process into distinct phases: initial synchronization phase with handshake mechanisms, and steady-state phase with periodic messages. It also segments fault handling into detection, isolation, and recovery components. This segmentation allows the system to achieve high fault-tolerance without requiring entirely complex protocol redesign, as each segment can be optimized independently.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The protocol performs preliminary actions by establishing handshake sequences before normal synchronization operates, pre-configuring fault tolerance capabilities. It also implements preliminary fault detection mechanisms that continuously monitor communication channels and prepare recovery procedures in advance. This preliminary action approach enables the system to handle multiple inconsistent faults and transient disturbances without protocol complexity overwhelming the implementation.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If multiple independent communication channels are required to tolerate failure, then fault-tolerance improves, but system cost and complexity increase

Engineering Contradiction:
Improvefault-toleranceVSAvoidsystem cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent introduces intermediary components including guardian processes and supervisor entities that mediate between the communication channels and the clock synchronization logic. These intermediaries detect faults, isolate failed channels, and coordinate recovery actions, enabling the system to tolerate multiple failures even with limited independent communication channels. This intermediary layer provides fault-tolerance without requiring a proportional increase in communication infrastructure cost.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The protocol implements comprehensive feedback mechanisms where synchronization messages include status information about channel health and clock state. This feedback enables dynamic adjustment of synchronization parameters and automatic recovery when faults are detected. The feedback loop allows the system to maintain fault-tolerance with fewer communication channels by intelligently managing resource usage and detecting failures early, thereby reducing overall system cost.

Inventive Principle:
Principle #23Feedback

3Reliability

If the protocol handles arbitrary transient disturbances and permanent failures, then reliability improves, but the complexity of detecting and measuring faults increases

Engineering Contradiction:
Improvefault-toleranceVSAvoidfault detection complexity
Core Design Contradiction:
ReliabilityVSDifficulty of detecting and measuring

Solution Approach 1:

The protocol employs periodic synchronization messages and periodic health check mechanisms to detect faults. By sending synchronized clock messages at regular intervals and monitoring for deviations, the system can detect both transient disturbances and permanent failures. This periodic action approach simplifies fault detection compared to continuous monitoring, as it uses discrete, predictable measurement points that are easier to implement and analyze while maintaining high reliability.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The protocol implements partial fault detection by focusing on the most critical fault indicators rather than attempting to detect and measure every possible failure mode. It uses excessive action by implementing multiple redundant detection mechanisms for critical faults, such as multiple guardian processes monitoring different aspects of synchronization. This selective approach balances fault detection capability with implementation complexity, achieving high reliability without requiring overly complex detection systems.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8463945B2Method for synchronizing local clocks in a distributed computer network
Publication Date: 2013.06.11 HONEYWELL INTERNATIONAL INC
  • US8463945B2 patent drawing
  • US8463945B2 patent drawing
  • US8463945B2 patent drawing

AI summary

A method for synchronizing local clocks in a distributed computer network, wherein end systems and switches of the network executes the method as a synchronization state machine, which uses three different frame types. The states in the state machine belong to an unsynchronized or to a synchronized set of states. All end systems being configured as Synchronization Master periodically send coldstart frames in one of the unsynchronized states, all end systems being configured as Synchronization Master react to the reception of a coldstart frame by sending a coldstart acknowledgment frame a first timeout after the reception of the coldstart frame on all replicated communication channels. First timeout is reset when a consecutive coldstart frame is received before the coldstart acknowledge is sent, and all Synchronization Masters react to the reception of a coldstart acknowledgment frame by starting a second timeout and enter a synchronized state when the second timeout expires.