Distributed Counter Synchronization Using Offset-Based Slave Initialization
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Solution Overview
Problem
Existing data processing systems face challenges in synchronizing distributed counters with a central 'always-on' system counter, leading to frequent power cycling and potential inconsistencies in time observation across processing elements.
Innovation Solution
The implementation of master and slave counter circuitry with a synchronization connection that communicates a count offset value and timing signal, allowing the slave counter to initialize its counting operation in response, ensuring atomic and hardware-based synchronization with bounded latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If distributed counters are frequently power-cycled, then the system can adapt to power management requirements, but synchronization consistency deteriorates and requires frequent re-synchronization
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing offset values that compensate for expected power-cycle delays. When a slave counter is power-cycled, it uses the pre-computed offset to immediately jump to the correct count value, avoiding the need for frequent re-synchronization and maintaining consistency despite power management activities.
Solution Approach 2:
The patent introduces an offset value as an intermediary parameter that mediates between the master counter and slave counters during power-cycle events. This offset acts as a compensation mechanism that allows slave counters to maintain synchronization consistency even when frequently power-cycled, resolving the contradiction between power management flexibility and synchronization reliability.
2Reliability
If distributed counters are accurately synchronized to the system counter, then time observation consistency is improved, but the complexity of synchronization operations increases
Solution Approach 1:
The patent extracts the complex synchronization operation into a separate, dedicated synchronization mechanism that uses pre-computed offsets. This separates the time-keeping function from the synchronization function, allowing accurate time observation consistency to be maintained while reducing the operational complexity by automating the synchronization process through offset-based initialization.
Solution Approach 2:
The patent implements self-service by enabling slave counters to automatically initialize themselves using pre-computed offset values without requiring complex external synchronization operations. The offset mechanism allows each slave counter to independently achieve accurate synchronization with the master counter, reducing overall system complexity while maintaining time observation consistency.
3Speed
If slave counters initialize using offset values, then synchronization speed is improved, but the precision of timing relationship may be compromised
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the offset value based on the master counter's current state and the expected power-cycle duration. This allows the system to maintain both fast synchronization speed and high timing precision by changing the offset parameter to compensate for any discrepancies introduced during the power-cycle interval, ensuring accurate timing relationships are preserved.
Data Source
AI summary
Apparatus comprises master counter circuitry to generate a master count signal in response to a clock signal; slave counter circuitry responsive to the clock signal to generate a respective slave count signal; and a synchronisation connection providing signal communication between the master counter circuitry and the slave counter circuitry; the master counter circuitry being configured to provide to the slave counter circuitry via the synchronisation connection: (i) data indicative of a count offset value and (ii) a timing signal defining a timing relationship between the clock signal and the count offset value; and the slave counter circuitry being configured, during a synchronisation operation for that slave counter circuitry, to initialise a counting operation of that slave counter circuitry in response to the data indicative of the count offset value and a timing signal provided by the master counter circuitry.