Distributed CRC Polar Coding for Early-Termination Decoding

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Solution Overview

Problem

Current polar code decoding methods for 5G eMBB and mMTC often result in high energy consumption and latency due to reliance on single CRC or parity bits for early termination, which can lead to increased miss detection and inefficient decoding processes.

Innovation Solution

The proposed method involves distributing CRC, parity, or hash bits to enable early termination by allowing them to decode together with information bits, using a two-stage CRC attachment apparatus with J bits for error detection and J' bits for error correction, and employing a specific CRC polynomial distribution to facilitate early termination while reducing miss detection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If single CRC or parity bit is used for early termination, then decoding speed is improved, but miss detection rate increases

Engineering Contradiction:
Improvedecoding speedVSAvoidmiss detection rate
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent divides the single CRC/parity bit into multiple distributed CRC bits (J bits) and parity bits (J' bits) placed at different positions in the code block. This segmentation allows multiple independent check points during decoding, enabling early termination while reducing miss detection through distributed verification

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses more check bits (J + J' bits) than the traditional single CRC bit, performing excessive error detection actions. This allows the system to terminate decoding early when errors are detected while maintaining high reliability through the additional distributed check points

Inventive Principle:
Principle #16Partial or excessive action

2Use of energy by moving object

If distributed CRC bits are used for early termination, then energy consumption is reduced, but decoding complexity increases

Engineering Contradiction:
Improveenergy consumptionVSAvoiddecoding complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The distributed CRC bits are segmented and placed at specific positions that enable progressive checking during decoding. The segmentation allows the decoder to perform simple bitwise operations at each check point rather than complex overall verification, reducing energy consumption while managing complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The CRC and parity bits are pre-calculated and distributed at specific positions before decoding. This preliminary arrangement allows the decoder to perform simple early termination checks without complex real-time calculations, reducing energy consumption during the decoding process

Inventive Principle:
Principle #10Preliminary action

3Loss of time

If distributed CRC bits are used for early termination, then latency is reduced, but reliability may worsen due to higher miss detection

Engineering Contradiction:
ImprovelatencyVSAvoidmiss detection probability
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The distributed CRC bits create multiple segmentation points for error detection throughout the decoding process. This segmentation enables early termination when errors are detected at any point, reducing latency while the distributed nature of multiple check bits maintains reliability by providing multiple verification opportunities

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The distributed CRC and parity bits provide continuous feedback during the decoding process. Each distributed bit acts as a feedback checkpoint that can trigger early termination, reducing latency while the cumulative feedback from multiple distributed bits maintains high reliability through redundant verification

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP3596830B1Early termination with distributed CRC polar codes
Publication Date: 2024.09.18 NOKIA TECHNOLOGIES OY
  • EP3596830B1 patent drawingFigure 1
  • EP3596830B1 patent drawingFigure 2~3
  • EP3596830B1 patent drawingFigure 4

AI summary

A method for encoding a sequence of control information bits comprising: generating a sequence of error detection bits based on the sequence of control information bits; generating a sequence of error correction bits based on the sequence of control information bits; and distributing the sequence of error detection bits and the sequence of error correction bits between the sequence of control information bits to form a combined sequence of bits, such that the bit order of the combined sequence of bits following the distribution enables an error detection check to be performed before or after a first error correction check bit.