Distributed Credit FIFO Link for Configurable Mesh Data Bus
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Solution Overview
Problem
Current network processors face challenges in efficiently managing packet traffic and resource allocation across multiple islands in integrated circuits, leading to bottlenecks and reduced processing capacity due to limitations in data bus architecture and communication protocols.
Innovation Solution
The island-based network flow processor (IB-NFP) integrated circuit employs a configurable mesh data bus with distributed credit First-In-First-Out (FIFO) structures and a staggered island layout, enabling simultaneous multiple reads and writes across the bus, and dynamic resource allocation through a global event chain and local event ring, optimizing packet processing and memory management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a traditional data bus architecture is used in network processors, then the structure is simple and easy to implement, but the processing capacity and efficiency are limited due to bottlenecks in data transmission
Solution Approach 1:
The data bus architecture is segmented into multiple independent mesh networks, each handling specific data flows between islands. This segmentation allows parallel data transmission across multiple paths, eliminating the single-bus bottleneck and significantly increasing processing capacity while maintaining manageable complexity through modular design
Solution Approach 2:
The data bus transitions from a one-dimensional linear bus to a two-dimensional mesh network topology. This dimensional change provides multiple routing paths between islands, enabling concurrent data transmissions and dramatically improving throughput without proportionally increasing system complexity
2Productivity
If multiple islands are added to increase processing power, then the processing capacity increases, but the resource allocation and communication efficiency decrease due to limitations in data bus architecture
Solution Approach 1:
The mesh data bus provides dynamic routing capabilities where data paths can be reconfigured based on real-time communication needs between islands. This dynamic adaptability allows efficient resource allocation as islands are added or removed, maintaining communication efficiency regardless of the number of islands in the system
Solution Approach 2:
The mesh network topology provides universal connectivity where any island can communicate with any other island through multiple possible paths. This multi-functionality allows the same data bus infrastructure to efficiently support varying numbers and configurations of islands, improving resource allocation efficiency across different processing power scenarios
3Productivity
If a configurable mesh data bus is implemented to enable concurrent operations, then the processing efficiency and resource utilization improve, but the device complexity and implementation difficulty increase
Solution Approach 1:
The mesh data bus employs configurable parameters such as routing tables, credit values, and FIFO depths that can be adjusted to optimize performance for different workloads. These parameter changes enable the system to achieve high processing efficiency while managing complexity through software-controlled configuration rather than hardwired complexity
Solution Approach 2:
FIFO buffers and credit-based flow control mechanisms serve as intermediaries between islands, managing data flow and synchronization automatically. These intermediary components simplify the overall system complexity by handling complex timing and coordination issues locally at each island interface, while enabling concurrent operations across the mesh network
4Productivity
If distributed credit FIFO structures are used for flow control, then the packet handling efficiency improves and bottlenecks are reduced, but the device complexity and implementation difficulty increase
Solution Approach 1:
The distributed credit FIFO system operates autonomously at each island interface, with local credit counters and FIFO buffers managing their own flow control without centralized intervention. This self-service approach improves packet handling efficiency by eliminating single-point bottlenecks while keeping the implementation manageable through localized, identical modules replicated across islands
Data Source
AI summary
An island-based integrated circuit includes a configurable mesh data bus. The data bus includes four meshes. Each mesh includes, for each island, a crossbar switch and radiating half links. The half links of adjacent islands align to form links between crossbar switches. A link is implemented as two distributed credit FIFOs. In one direction, a link portion involves a FIFO associated with an output port of a first island, a first chain of registers, and a second FIFO associated with an input port of a second island. When a transaction value passes through the FIFO and through the crossbar switch of the second island, an arbiter in the crossbar switch returns a taken signal. The taken signal passes back through a second chain of registers to a credit count circuit in the first island. The credit count circuit maintains a credit count value for the distributed credit FIFO.