Distributed Crossbar Network for Multiprocessor Interconnect
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As multiprocessing systems grow in size, conventional crossbar designs become impractical due to increased complexity, cost, and latency issues caused by the need for multiple levels of crossbars and large silicon areas, limiting the number of processors that can be effectively interconnected.
Innovation Solution
A multiprocessing system with a specific configuration of crossbars that allows for single-hop processor-to-processor communication across a network, where the number of crossbars is determined by the formula X*(X−1)/2, ensuring all processors are connected with each other through a minimal number of crossbars, each with twice the number of ports as processors in a cluster.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a large number of processors are interconnected using conventional crossbar designs, then the system can handle more processors, but the silicon area required increases and fabrication becomes more difficult and expensive
Solution Approach 1:
The system divides the processor interconnection network into multiple processor clusters, each with its own crossbar. This segmentation allows the total number of processors to increase without requiring a single large crossbar, thus reducing the silicon area required per crossbar and making fabrication more manageable.
Solution Approach 2:
The patent transitions from a flat, single-level crossbar architecture to a hierarchical, multi-level architecture where clusters are organized in tiers. This dimensional change allows processors to be interconnected through multiple levels of crossbars, reducing the port requirements for each individual crossbar and the overall silicon area.
2Ease of manufacture
If vendor-provided crossbars with predefined ports are used, then the system can be manufactured using standard components, but design flexibility is limited when desired port numbers are not available
Solution Approach 1:
By segmenting the system into clusters with smaller crossbars, the patent enables the use of vendor-provided crossbars with standard port configurations. Each cluster can be independently designed with appropriate crossbar sizes, providing design flexibility while maintaining ease of manufacture through standardized components.
Solution Approach 2:
The hierarchical cluster architecture provides a universal framework that can accommodate different numbers of processors and crossbar configurations. The same basic cluster design can be replicated and scaled to meet different design requirements, maintaining both ease of manufacture and adaptability.
3Quantity of substance
If multiple levels of crossbars are used to interconnect processors, then the system can accommodate more processors with fewer ports per crossbar, but signal propagation latency increases and system performance decreases
Solution Approach 1:
The patent optimizes local communication by providing direct crossbar connectivity within each processor cluster. This ensures that locally-related processors communicate with minimal latency, while the hierarchical structure handles remote communications efficiently, balancing the trade-off between system scale and performance.
Solution Approach 2:
The hierarchical cluster architecture organizes processors in a multi-level structure where communication can occur through optimal paths. The system provides direct single-hop connectivity for processors within the same cluster tier, reducing latency for common communication patterns while still accommodating large numbers of processors.
4Productivity
If the number of crossbars is increased to provide single-hop connectivity for all processors, then latency is reduced and performance increases, but device complexity and fabrication difficulty increase
Solution Approach 1:
The patent uses segmentation to distribute the crossbar infrastructure across multiple processor clusters. While the total number of crossbars increases to provide single-hop connectivity, each crossbar is smaller and simpler, making fabrication more manageable. The segmented architecture provides performance benefits while controlling complexity through modular design.
Data Source
AI summary
A system and method for single hop, processor-to-processor communication in a multiprocessing system over a plurality of crossbars are disclosed. Briefly described, one embodiment is a multiprocessing system comprising a plurality of processors having a plurality of high-bandwidth point-to-point links; a plurality of processor clusters, each processor cluster having a predefined number of the processors residing therein; and a plurality of crossbars, one of the crossbars coupling each of the processors of one of the plurality of processor clusters to each of the processors of another of the plurality of processor clusters, such that all processors are coupled to each of the other processors, and such that the number of crossbars is equal to [X*(X−1)/2], wherein X equals the number of processor clusters.