Distributed Power Combining Amplifier With Symmetric Doherty Topology
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Solution Overview
Problem
Existing power amplifiers in wireless communication devices face challenges in maintaining efficiency at power backoff levels while limiting distortion and harmonics, especially when operating near saturation points.
Innovation Solution
A distributed active power combining amplifier architecture is employed, comprising main and peaking amplifiers coupled symmetrically to transformer segments, which maintains impedance and efficiency at reduced power levels through a voltage mode Doherty configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a power amplifier operates near saturation points to provide maximum output power, then power output is improved, but efficiency deteriorates at power backoff levels
Solution Approach 1:
The power amplifier is divided into multiple parallel amplifier channels (e.g., four channels), each handling a portion of the total power. This segmentation allows independent control of each channel, enabling efficient power backoff by selectively reducing power in individual channels while maintaining overall system efficiency through distributed active power combining.
2Power
If a power amplifier operates near saturation points to provide maximum output power, then power output is improved, but signal distortion and harmonics increase
Solution Approach 1:
By dividing the amplifier into multiple parallel channels, each operating at a lower individual power level, the system achieves maximum total power output while each channel operates in a more linear region, thereby reducing signal distortion and harmonic generation compared to a single amplifier operating at saturation.
Solution Approach 2:
Multiple amplifier channels are combined through distributed active power combining to achieve high total output power. This merging allows the system to benefit from the linear operation of individual channels while achieving the power output of a saturated amplifier, thus reducing distortion and harmonics.
3Loss of energy
If impedance is increased at reduced power levels, then power efficiency is maintained, but device complexity increases
Solution Approach 1:
The amplifier architecture is segmented into multiple parallel channels with distributed active power combining, enabling independent impedance control for each channel. This segmentation allows the system to maintain high power efficiency at reduced power levels by optimizing impedance in individual channels without requiring complex global impedance transformation circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances efficiency and reduces distortion and harmonics, ensuring high performance even at power backoff levels, thereby improving signal quality and compliance with RF transmission standards.
Implementation Method 1
a transformer having a primary side and a secondary side, the primary side having at least a first primary segment, a second primary segment, a third primary segment and a fourth primary segment
Data Source
AI summary
A distributed active, power combining amplifier including at least one main amplifier having a first main portion and a second main portion, at least one peaking amplifier having a first peaking portion and a second peaking portion, and a transformer having a primary side and a secondary side, the primary side having at least a first primary segment, a second primary segment, a third primary segment and a fourth primary segment, wherein the first main portion is coupled to the first primary segment and the second primary segment, the first peaking portion is coupled to the first primary segment or the second primary segment, the second main portion is coupled to the third primary segment and the fourth primary segment, and the second peaking portion is coupled to the third primary segment or the fourth primary segment in a symmetric architecture.