Distributed ECC Architecture for Storage Data Path Bottlenecks

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current storage systems using ECC engines face performance bottlenecks due to centralized ECC computation, which can be economically inefficient and require specialized storage media devices with added logic, and there is a need for a distributed approach that optimizes ECC computations without affecting system performance.

Innovation Solution

The solution involves distributing ECC engines across multiple storage media devices, with each ECC engine handling computations for a corresponding group of devices, allowing parallel ECC operations on multiple data parts, and integrating ECC engines into storage DMA controllers or interface controllers to perform encoding, detection, and correction operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a centralized ECC engine is placed in the main storage controller, then ECC computation can be performed, but it creates a performance bottleneck in the data path

Engineering Contradiction:
ImproveECC computation capabilityVSAvoiddata transfer speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent divides the centralized ECC engine into multiple distributed ECC engines, with each engine handling ECC computations for a specific group of storage media devices. This segmentation eliminates the single-point bottleneck by distributing the computational load across multiple parallel processing units in the data path.

Inventive Principle:
Principle #1Segmentation

2Productivity

If ECC engines are embedded on each storage device, then the data path bottleneck is eliminated, but it increases device complexity and cost

Engineering Contradiction:
Improveparallel ECC processing capabilityVSAvoidstorage media device logic
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent makes standard storage interface controllers multi-functional by integrating ECC engine capabilities into them. This allows the interface controllers to perform both their standard storage interface functions and ECC computation functions, eliminating the need for specialized storage media devices with added logic while maintaining parallel processing capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If ECC engines are embedded on each storage device, then parallel processing is achieved, but it requires specialized storage media devices with added logic

Engineering Contradiction:
ImproveECC computation speedVSAvoidstorage device standardization
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent enables standard storage interface controllers to perform ECC computations by integrating ECC engine functionality into them. This approach maintains storage device standardization and ease of manufacture while achieving parallel ECC processing, as no specialized storage media devices are required.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9996419B1Storage system with distributed ECC capability
Publication Date: 2018.06.12 BITMICRO LLC
  • US9996419B1 patent drawing
  • US9996419B1 patent drawing
  • US9996419B1 patent drawing

AI summary

Embodiments of the present invention relate to an apparatus, method, and/or sequence for a distributed ECC that may be used in a storage system. In another embodiment of the invention, an apparatus for handling distributed error correction code (ECC) operations, includes: a plurality of ECC engines configured to perform ECC operations in parallel on multiple data parts; the plurality of ECC engines distributed in parallel to receive some of the multiple data parts that are read from storage media devices and to receive some of the other multiple data parts that are to be written to the storage media devices; and the plurality of ECC engines configured to use respective ECC bytes corresponding to respective ones of the multiple data parts.