Distributed Frame Buffer for Scalable Parallel Rendering

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Solution Overview

Problem

Current parallel rendering techniques face scalability bottlenecks due to centralized frame buffers, particularly in high-resolution multi-display arrangements and progressive refinement algorithms, which lead to memory and input/output bus bandwidth issues, and complicate task scheduling across multiple worker nodes.

Innovation Solution

A distributed frame buffer system that allows post-processing algorithms to run distributedly on worker nodes, enabling each node to query and own pixel data for post-processing, reducing the burden on a single master node and facilitating efficient communication across nodes with greater aggregate bandwidth.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single frame buffer at master node is used for parallel rendering, then rendering operations can be coordinated centrally, but memory bandwidth and I/O bus bandwidth become severe bottlenecks at high resolutions

Engineering Contradiction:
Improverendering throughputVSAvoidmemory bandwidth
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent divides the single centralized frame buffer into multiple distributed frame buffer segments, with each worker node maintaining its own frame buffer segment. This segmentation allows parallel rendering operations to proceed simultaneously across multiple nodes without contending for the same memory bandwidth resources, thereby resolving the bottleneck while maintaining coordinated rendering through the distributed architecture.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If pixel data is gathered at master node before display, then centralized compositing can be performed, but scalability is severely limited by master node bandwidth

Engineering Contradiction:
ImprovescalabilityVSAvoidI/O bus bandwidth
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent segments the frame buffer across multiple worker nodes, allowing each node to independently manage its portion of pixel data. This enables the system to scale to high resolutions and multiple displays by adding more worker nodes, as each node handles its own data locally without requiring aggregation at the master node, thereby eliminating the I/O bandwidth bottleneck.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a single-dimension centralized frame buffer model to a multi-dimensional distributed frame buffer architecture. By distributing frame buffer segments across multiple spatial dimensions (different worker nodes), the system achieves scalability without being constrained by the master node's I/O bandwidth, effectively adding a new architectural dimension to the rendering system.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Manufacturing precision

If progressive refinement algorithms are used requiring previous frame data, then rendering quality improves, but task scheduling becomes complicated across worker nodes

Engineering Contradiction:
Improverendering qualityVSAvoidtask scheduling complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent implements preliminary action by having worker nodes maintain their own frame buffer segments that persist across frames. This allows progressive refinement algorithms to access previous frame data directly from local memory without requiring complex inter-node data transfer or scheduling coordination, thereby maintaining rendering quality while simplifying the task scheduling complexity.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10249073B2Distributed frame buffer and API for scalable parallel rendering
Publication Date: 2019.04.02 INTEL CORP
  • US10249073B2 patent drawing
  • US10249073B2 patent drawing
  • US10249073B2 patent drawing

AI summary

Embodiments provide for a graphics processing apparatus comprising multiple compute nodes coupled to a communication layer, a rendering system executing on the multiple compute nodes, wherein the communication layer enables a distributed object executing on one of the multiple compute nodes to communicate with the rendering system, and a distributed framebuffer logic to subdivide a logical screen space for a frame into multiple regions and subdivide ownership of the regions among the multiple compute nodes.