Distributed Frequency Synchronization Using Fastest Node Clock Rate

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Solution Overview

Problem

Current wireless communication systems face challenges in enabling distributed frequency synchronization for device-to-device (D2D) communications in LTE environments without a centralized controlling entity, which is essential for infrastructure-free communication systems as demand for D2D communication increases.

Innovation Solution

A method and apparatus for enabling distributed frequency synchronization based on the fastest node clock rate, where user equipment (UE) receives synchronization signals from other UEs, determines the earliest time of arrival, and adjusts its internal clock rate to align with the fastest clock rate plus a positive offset, ensuring synchronized communication.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If distributed frequency synchronization is implemented without a centralized controlling entity, then infrastructure-free communication is enabled, but frequency synchronization accuracy deteriorates

Engineering Contradiction:
Improveinfrastructure-free communication capabilityVSAvoidfrequency synchronization accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

Each UE independently determines the fastest clock rate by receiving synchronization signals from other UEs, calculating time of arrivals, and autonomously adjusting its own clock rate without requiring centralized control. This self-service mechanism enables infrastructure-free operation while maintaining synchronization through distributed peer-to-peer clock rate determination and adjustment.

Inventive Principle:
Principle #25Self-service

2Reliability

If UEs adjust clock rates to align with the fastest clock rate, then frequency synchronization is improved, but clock rate deviation and interference increase

Engineering Contradiction:
Improvefrequency synchronizationVSAvoidclock rate deviation and interference
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The system dynamically changes the clock rate parameter of UEs by adjusting each UE's clock rate to match the determined fastest clock rate. This parameter adjustment ensures frequency synchronization across the distributed network while the fastest clock rate serves as a dynamic reference that adapts to the actual performance of the network nodes.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If UEs receive and process synchronization signals from multiple other UEs, then synchronization robustness is improved, but processing complexity increases

Engineering Contradiction:
Improvesynchronization robustnessVSAvoidsignal processing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The synchronization process is segmented into distinct functional steps: receiving synchronization signals from multiple UEs, determining time of arrivals for each signal, identifying the fastest clock rate based on these measurements, and adjusting the local clock rate. This segmentation of the synchronization process into manageable stages reduces processing complexity while maintaining robustness through multi-UE signal reception.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP2920900B1Methods and apparatus for enabling distributed frequency synchronization
Publication Date: 2023.05.10 QUALCOMM INC
  • EP2920900B1 patent drawingFigure 1
  • EP2920900B1 patent drawingFigure 2
  • EP2920900B1 patent drawingFigure 3

AI summary

A method, an apparatus, and a computer program product for wireless communication are provided in connection with enabling distributed frequency synchronization based on a fastest node clock rate. In one example, a first UE is equipped to determine that a fastest clock rate is faster than an internal clock rate of the first UE by more than a first positive offset, and adjust the internal clock rate based on the determined fastest clock rate. In an aspect, the fastest clock rate is associated with a second UE of one or more other UEs from which synchronization signals may be received. In another example, a UE is equipped to obtain GPS based timing information, adjust an internal clock rate based on the GPS based timing information, and transmit a synchronization signal at an artificially earlier time in comparison to a scheduled time of transmission associated with the adjusted internal clock rate.